* [PATCH v6 05/15] arm: dts: msm8974: thermal: Add thermal zones for each sensor
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:12 ` Andy Gross
2019-10-21 10:35 ` [PATCH v6 06/15] arm64: dts: msm8916: thermal: Fixup HW ids for cpu sensors Amit Kucheria
` (7 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
msm8974 has 11 sensors connected to a single TSENS IP. Define a thermal
zone for each of those sensors to expose the temperature of each zone.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 90 +++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 369e58f64145d..33c534370fd5c 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -217,6 +217,96 @@
};
};
};
+
+ q6-dsp-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 1>;
+
+ trips {
+ q6_dsp_alert0: trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+
+ modemtx-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 2>;
+
+ trips {
+ modemtx_alert0: trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+
+ video-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 3>;
+
+ trips {
+ video_alert0: trip-point0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+
+ wlan-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 4>;
+
+ trips {
+ wlan_alert0: trip-point0 {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+
+ gpu-thermal-top {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 9>;
+
+ trips {
+ gpu1_alert0: trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
+
+ gpu-thermal-bottom {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 10>;
+
+ trips {
+ gpu2_alert0: trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+ };
+ };
};
cpu-pmu {
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 05/15] arm: dts: msm8974: thermal: Add thermal zones for each sensor
2019-10-21 10:35 ` [PATCH v6 05/15] arm: dts: msm8974: thermal: Add thermal zones for each sensor Amit Kucheria
@ 2019-10-27 5:12 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:12 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:24PM +0530, Amit Kucheria wrote:
> msm8974 has 11 sensors connected to a single TSENS IP. Define a thermal
> zone for each of those sensors to expose the temperature of each zone.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Tested-by: Brian Masney <masneyb@onstation.org>
> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Applied for 5.5
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 06/15] arm64: dts: msm8916: thermal: Fixup HW ids for cpu sensors
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
2019-10-21 10:35 ` [PATCH v6 05/15] arm: dts: msm8974: thermal: Add thermal zones for each sensor Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:08 ` Andy Gross
2019-10-21 10:35 ` [PATCH v6 07/15] dt-bindings: thermal: tsens: Convert over to a yaml schema Amit Kucheria
` (6 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
msm8916 uses sensors 0, 1, 2, 4 and 5. Sensor 3 is NOT used. Fixup the
device tree so that the correct sensor ID is used and as a result we can
actually check the temperature for the cpu2_3 sensor.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 5ea9fb8f2f87d..8686e101905cc 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -179,7 +179,7 @@
polling-delay-passive = <250>;
polling-delay = <1000>;
- thermal-sensors = <&tsens 4>;
+ thermal-sensors = <&tsens 5>;
trips {
cpu0_1_alert0: trip-point@0 {
@@ -209,7 +209,7 @@
polling-delay-passive = <250>;
polling-delay = <1000>;
- thermal-sensors = <&tsens 3>;
+ thermal-sensors = <&tsens 4>;
trips {
cpu2_3_alert0: trip-point@0 {
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 06/15] arm64: dts: msm8916: thermal: Fixup HW ids for cpu sensors
2019-10-21 10:35 ` [PATCH v6 06/15] arm64: dts: msm8916: thermal: Fixup HW ids for cpu sensors Amit Kucheria
@ 2019-10-27 5:08 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:08 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:25PM +0530, Amit Kucheria wrote:
> msm8916 uses sensors 0, 1, 2, 4 and 5. Sensor 3 is NOT used. Fixup the
> device tree so that the correct sensor ID is used and as a result we can
> actually check the temperature for the cpu2_3 sensor.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
> ---
Applied for 5.5
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 07/15] dt-bindings: thermal: tsens: Convert over to a yaml schema
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
2019-10-21 10:35 ` [PATCH v6 05/15] arm: dts: msm8974: thermal: Add thermal zones for each sensor Amit Kucheria
2019-10-21 10:35 ` [PATCH v6 06/15] arm64: dts: msm8916: thermal: Fixup HW ids for cpu sensors Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-21 10:35 ` [PATCH v6 08/15] arm64: dts: sdm845: thermal: Add interrupt support Amit Kucheria
` (5 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: linux-pm, devicetree
Older IP only supports the 'uplow' interrupt, but newer IP supports
'uplow' and 'critical' interrupts. Document interrupt support in the
tsens driver by converting over to a YAML schema.
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../bindings/thermal/qcom-tsens.txt | 55 ------
.../bindings/thermal/qcom-tsens.yaml | 168 ++++++++++++++++++
MAINTAINERS | 1 +
3 files changed, 169 insertions(+), 55 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/thermal/qcom-tsens.txt
create mode 100644 Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt
deleted file mode 100644
index 673cc1831ee9d..0000000000000
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-* QCOM SoC Temperature Sensor (TSENS)
-
-Required properties:
-- compatible:
- Must be one of the following:
- - "qcom,msm8916-tsens" (MSM8916)
- - "qcom,msm8974-tsens" (MSM8974)
- - "qcom,msm8996-tsens" (MSM8996)
- - "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404)
- - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998)
- - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845)
- The generic "qcom,tsens-v2" property must be used as a fallback for any SoC
- with version 2 of the TSENS IP. MSM8996 is the only exception because the
- generic property did not exist when support was added.
- Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for
- any SoC with version 1 of the TSENS IP.
-
-- reg: Address range of the thermal registers.
- New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM
- register spaces separately, with order being TM before SROT.
- See Example 2, below.
-
-- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
-- #qcom,sensors: Number of sensors in tsens block
-- Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify
-nvmem cells
-
-Example 1 (legacy support before a fallback tsens-v2 property was introduced):
-tsens: thermal-sensor@900000 {
- compatible = "qcom,msm8916-tsens";
- reg = <0x4a8000 0x2000>;
- nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
- nvmem-cell-names = "caldata", "calsel";
- #thermal-sensor-cells = <1>;
- };
-
-Example 2 (for any platform containing v2 of the TSENS IP):
-tsens0: thermal-sensor@c263000 {
- compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
- reg = <0xc263000 0x1ff>, /* TM */
- <0xc222000 0x1ff>; /* SROT */
- #qcom,sensors = <13>;
- #thermal-sensor-cells = <1>;
- };
-
-Example 3 (for any platform containing v1 of the TSENS IP):
-tsens: thermal-sensor@4a9000 {
- compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
- reg = <0x004a9000 0x1000>, /* TM */
- <0x004a8000 0x1000>; /* SROT */
- nvmem-cells = <&tsens_caldata>;
- nvmem-cell-names = "calib";
- #qcom,sensors = <10>;
- #thermal-sensor-cells = <1>;
- };
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
new file mode 100644
index 0000000000000..23afc7bf5a44d
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -0,0 +1,168 @@
+# SPDX-License-Identifier: (GPL-2.0 OR MIT)
+# Copyright 2019 Linaro Ltd.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: QCOM SoC Temperature Sensor (TSENS)
+
+maintainers:
+ - Amit Kucheria <amit.kucheria@linaro.org>
+
+description: |
+ QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
+ three distinct major versions of the IP that is supported by a single driver.
+ The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
+ everything before v1 when there was no versioning information.
+
+properties:
+ compatible:
+ oneOf:
+ - description: v0.1 of TSENS
+ items:
+ - enum:
+ - qcom,msm8916-tsens
+ - qcom,msm8974-tsens
+ - const: qcom,tsens-v0_1
+
+ - description: v1 of TSENS
+ items:
+ - enum:
+ - qcom,qcs404-tsens
+ - const: qcom,tsens-v1
+
+ - description: v2 of TSENS
+ items:
+ - enum:
+ - qcom,msm8996-tsens
+ - qcom,msm8998-tsens
+ - qcom,sdm845-tsens
+ - const: qcom,tsens-v2
+
+ reg:
+ maxItems: 2
+ items:
+ - description: TM registers
+ - description: SROT registers
+
+ nvmem-cells:
+ minItems: 1
+ maxItems: 2
+ description:
+ Reference to an nvmem node for the calibration data
+
+ nvmem-cells-names:
+ minItems: 1
+ maxItems: 2
+ items:
+ - enum:
+ - caldata
+ - calsel
+
+ "#qcom,sensors":
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - minimum: 1
+ - maximum: 16
+ description:
+ Number of sensors enabled on this platform
+
+ "#thermal-sensor-cells":
+ const: 1
+ description:
+ Number of cells required to uniquely identify the thermal sensors. Since
+ we have multiple sensors this is set to 1
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,msm8916-tsens
+ - qcom,msm8974-tsens
+ - qcom,qcs404-tsens
+ - qcom,tsens-v0_1
+ - qcom,tsens-v1
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: Combined interrupt if upper or lower threshold crossed
+ interrupt-names:
+ items:
+ - const: uplow
+
+ else:
+ properties:
+ interrupts:
+ items:
+ - description: Combined interrupt if upper or lower threshold crossed
+ - description: Interrupt if critical threshold crossed
+ interrupt-names:
+ items:
+ - const: uplow
+ - const: critical
+
+required:
+ - compatible
+ - reg
+ - "#qcom,sensors"
+ - interrupts
+ - interrupt-names
+ - "#thermal-sensor-cells"
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example 1 (legacy: for pre v1 IP):
+ tsens1: thermal-sensor@900000 {
+ compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
+ reg = <0x4a9000 0x1000>, /* TM */
+ <0x4a8000 0x1000>; /* SROT */
+
+ nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
+ nvmem-cell-names = "caldata", "calsel";
+
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
+
+ #qcom,sensors = <5>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example 2 (for any platform containing v1 of the TSENS IP):
+ tsens2: thermal-sensor@4a9000 {
+ compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
+ reg = <0x004a9000 0x1000>, /* TM */
+ <0x004a8000 0x1000>; /* SROT */
+
+ nvmem-cells = <&tsens_caldata>;
+ nvmem-cell-names = "calib";
+
+ interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
+
+ #qcom,sensors = <10>;
+ #thermal-sensor-cells = <1>;
+ };
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ // Example 3 (for any platform containing v2 of the TSENS IP):
+ tsens3: thermal-sensor@c263000 {
+ compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
+ reg = <0xc263000 0x1ff>,
+ <0xc222000 0x1ff>;
+
+ interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
+
+ #qcom,sensors = <13>;
+ #thermal-sensor-cells = <1>;
+ };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index a69e6db80c79e..c4df814b87b0d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13513,6 +13513,7 @@ L: linux-pm@vger.kernel.org
L: linux-arm-msm@vger.kernel.org
S: Maintained
F: drivers/thermal/qcom/
+F: Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
QUALCOMM VENUS VIDEO ACCELERATOR DRIVER
M: Stanimir Varbanov <stanimir.varbanov@linaro.org>
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v6 08/15] arm64: dts: sdm845: thermal: Add interrupt support
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
` (2 preceding siblings ...)
2019-10-21 10:35 ` [PATCH v6 07/15] dt-bindings: thermal: tsens: Convert over to a yaml schema Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:10 ` Andy Gross
2019-10-21 10:35 ` [PATCH v6 09/15] arm64: dts: msm8996: " Amit Kucheria
` (4 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
Register upper-lower interrupts for each of the two tsens controllers.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index f406a4340b05e..0990d5761860a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2950,6 +2950,8 @@
reg = <0 0x0c263000 0 0x1ff>, /* TM */
<0 0x0c222000 0 0x1ff>; /* SROT */
#qcom,sensors = <13>;
+ interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
@@ -2958,6 +2960,8 @@
reg = <0 0x0c265000 0 0x1ff>, /* TM */
<0 0x0c223000 0 0x1ff>; /* SROT */
#qcom,sensors = <8>;
+ interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 08/15] arm64: dts: sdm845: thermal: Add interrupt support
2019-10-21 10:35 ` [PATCH v6 08/15] arm64: dts: sdm845: thermal: Add interrupt support Amit Kucheria
@ 2019-10-27 5:10 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:10 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:27PM +0530, Amit Kucheria wrote:
> Register upper-lower interrupts for each of the two tsens controllers.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
> ---
Applied for 5.5
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 09/15] arm64: dts: msm8996: thermal: Add interrupt support
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
` (3 preceding siblings ...)
2019-10-21 10:35 ` [PATCH v6 08/15] arm64: dts: sdm845: thermal: Add interrupt support Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:10 ` Andy Gross
2019-10-21 10:35 ` [PATCH v6 10/15] arm64: dts: msm8998: " Amit Kucheria
` (3 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
Register upper-lower interrupts for each of the two tsens controllers.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 87f4d9c1b0d4c..4ca2e7b44559c 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -591,6 +591,8 @@
reg = <0x4a9000 0x1000>, /* TM */
<0x4a8000 0x1000>; /* SROT */
#qcom,sensors = <13>;
+ interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
@@ -599,6 +601,8 @@
reg = <0x4ad000 0x1000>, /* TM */
<0x4ac000 0x1000>; /* SROT */
#qcom,sensors = <8>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 09/15] arm64: dts: msm8996: thermal: Add interrupt support
2019-10-21 10:35 ` [PATCH v6 09/15] arm64: dts: msm8996: " Amit Kucheria
@ 2019-10-27 5:10 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:10 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:28PM +0530, Amit Kucheria wrote:
> Register upper-lower interrupts for each of the two tsens controllers.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 87f4d9c1b0d4c..4ca2e7b44559c 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
Applied for 5.5.
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 10/15] arm64: dts: msm8998: thermal: Add interrupt support
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
` (4 preceding siblings ...)
2019-10-21 10:35 ` [PATCH v6 09/15] arm64: dts: msm8996: " Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:10 ` Andy Gross
2019-10-21 10:35 ` [PATCH v6 11/15] arm64: dts: qcs404: " Amit Kucheria
` (2 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
Register upper-lower interrupts for each of the two tsens controllers.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index c6f81431983ee..489d631a96104 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -816,8 +816,9 @@
compatible = "qcom,msm8998-tsens", "qcom,tsens-v2";
reg = <0x010ab000 0x1000>, /* TM */
<0x010aa000 0x1000>; /* SROT */
-
#qcom,sensors = <14>;
+ interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
@@ -825,8 +826,9 @@
compatible = "qcom,msm8998-tsens", "qcom,tsens-v2";
reg = <0x010ae000 0x1000>, /* TM */
<0x010ad000 0x1000>; /* SROT */
-
#qcom,sensors = <8>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 10/15] arm64: dts: msm8998: thermal: Add interrupt support
2019-10-21 10:35 ` [PATCH v6 10/15] arm64: dts: msm8998: " Amit Kucheria
@ 2019-10-27 5:10 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:10 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:29PM +0530, Amit Kucheria wrote:
> Register upper-lower interrupts for each of the two tsens controllers.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
Applied for 5.5
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 11/15] arm64: dts: qcs404: thermal: Add interrupt support
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
` (5 preceding siblings ...)
2019-10-21 10:35 ` [PATCH v6 10/15] arm64: dts: msm8998: " Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:09 ` Andy Gross
2019-10-21 10:35 ` [PATCH v6 12/15] arm: dts: msm8974: " Amit Kucheria
2019-10-21 10:35 ` [PATCH v6 13/15] arm64: dts: msm8916: " Amit Kucheria
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
Register upper-lower interrupt for the tsens controller.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index a97eeb4569c00..b6a4e60739362 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -290,6 +290,8 @@
nvmem-cells = <&tsens_caldata>;
nvmem-cell-names = "calib";
#qcom,sensors = <10>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 11/15] arm64: dts: qcs404: thermal: Add interrupt support
2019-10-21 10:35 ` [PATCH v6 11/15] arm64: dts: qcs404: " Amit Kucheria
@ 2019-10-27 5:09 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:09 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:30PM +0530, Amit Kucheria wrote:
> Register upper-lower interrupt for the tsens controller.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
Applied for 5.5.
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 12/15] arm: dts: msm8974: thermal: Add interrupt support
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
` (6 preceding siblings ...)
2019-10-21 10:35 ` [PATCH v6 11/15] arm64: dts: qcs404: " Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:12 ` Andy Gross
2019-10-21 10:35 ` [PATCH v6 13/15] arm64: dts: msm8916: " Amit Kucheria
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
Register upper-lower interrupt for the tsens controller.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Brian Masney <masneyb@onstation.org>
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 33c534370fd5c..c1a3a7d7161cd 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -531,6 +531,8 @@
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
#qcom,sensors = <11>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 12/15] arm: dts: msm8974: thermal: Add interrupt support
2019-10-21 10:35 ` [PATCH v6 12/15] arm: dts: msm8974: " Amit Kucheria
@ 2019-10-27 5:12 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:12 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:31PM +0530, Amit Kucheria wrote:
> Register upper-lower interrupt for the tsens controller.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Tested-by: Brian Masney <masneyb@onstation.org>
> ---
Applied for 5.5.
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 13/15] arm64: dts: msm8916: thermal: Add interrupt support
2019-10-21 10:35 [PATCH v6 00/15] thermal: qcom: tsens: Add interrupt support Amit Kucheria
` (7 preceding siblings ...)
2019-10-21 10:35 ` [PATCH v6 12/15] arm: dts: msm8974: " Amit Kucheria
@ 2019-10-21 10:35 ` Amit Kucheria
2019-10-27 5:08 ` Andy Gross
8 siblings, 1 reply; 18+ messages in thread
From: Amit Kucheria @ 2019-10-21 10:35 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, agross,
masneyb, swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano,
Mark Rutland, Rob Herring, Zhang Rui
Cc: devicetree
Register upper-lower interrupt for the tsens controller.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 8686e101905cc..807f86a4535e0 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -816,6 +816,8 @@
nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
nvmem-cell-names = "calib", "calib_sel";
#qcom,sensors = <5>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
#thermal-sensor-cells = <1>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v6 13/15] arm64: dts: msm8916: thermal: Add interrupt support
2019-10-21 10:35 ` [PATCH v6 13/15] arm64: dts: msm8916: " Amit Kucheria
@ 2019-10-27 5:08 ` Andy Gross
0 siblings, 0 replies; 18+ messages in thread
From: Andy Gross @ 2019-10-27 5:08 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval, masneyb,
swboyd, julia.lawall, Amit Kucheria, Daniel Lezcano, Mark Rutland,
Rob Herring, Zhang Rui, devicetree
On Mon, Oct 21, 2019 at 04:05:32PM +0530, Amit Kucheria wrote:
> Register upper-lower interrupt for the tsens controller.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Applied for 5.5.
Andy
^ permalink raw reply [flat|nested] 18+ messages in thread