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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id g17sm334431pgn.37.2019.10.29.17.18.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 29 Oct 2019 17:18:14 -0700 (PDT) Date: Tue, 29 Oct 2019 17:17:56 -0700 From: Nicolin Chen To: Shengjiu Wang Cc: timur@kernel.org, Xiubo.Lee@gmail.com, festevam@gmail.com, broonie@kernel.org, alsa-devel@alsa-project.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] ASoC: fsl_asrc: Add support for imx8qm Message-ID: <20191030001756.GA19352@Asurada-Nvidia.nvidia.com> References: <1572340629-20702-1-git-send-email-shengjiu.wang@nxp.com> <1572340629-20702-2-git-send-email-shengjiu.wang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1572340629-20702-2-git-send-email-shengjiu.wang@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Oct 29, 2019 at 05:17:09PM +0800, Shengjiu Wang wrote: > There are two asrc module in imx8qm, each module has different > clock configuration, and the DMA type is EDMA. > > So in this patch, we define the new clocks, refine the clock map, > and include struct fsl_asrc_soc_data for different soc usage. > > The EDMA channel is fixed with each dma request, one dma request > corresponding to one dma channel. So we need to request dma > channel with dma request of asrc module. > > Signed-off-by: Shengjiu Wang > --- > sound/soc/fsl/fsl_asrc.c | 91 +++++++++++++++++++++++++++++------- > sound/soc/fsl/fsl_asrc.h | 65 +++++++++++++++++++++++++- > sound/soc/fsl/fsl_asrc_dma.c | 39 ++++++++++++---- > 3 files changed, 167 insertions(+), 28 deletions(-) > diff --git a/sound/soc/fsl/fsl_asrc_dma.c b/sound/soc/fsl/fsl_asrc_dma.c > index d6146de9acd2..dbb07a486504 100644 > --- a/sound/soc/fsl/fsl_asrc_dma.c > +++ b/sound/soc/fsl/fsl_asrc_dma.c > @@ -199,19 +199,40 @@ static int fsl_asrc_dma_hw_params(struct snd_soc_component *component, > > /* Get DMA request of Back-End */ > tmp_chan = dma_request_slave_channel(dev_be, tx ? "tx" : "rx"); > - tmp_data = tmp_chan->private; > - pair->dma_data.dma_request = tmp_data->dma_request; > - dma_release_channel(tmp_chan); > + /* tmp_chan may be NULL for it is already allocated by Back-End */ > + if (tmp_chan) { > + tmp_data = tmp_chan->private; > + if (tmp_data) > + pair->dma_data.dma_request = tmp_data->dma_request; If this patch is supposed to add a !tmp_chan case for EDMA, we probably shouldn't mute the !tmp_data case because dma_request will be NULL, although the code previously didn't have a check either. I mean we might need to error-out for !tmp_chan. Or... is this intentional? > + dma_release_channel(tmp_chan); > + } > > /* Get DMA request of Front-End */ > tmp_chan = fsl_asrc_get_dma_channel(pair, dir); > - tmp_data = tmp_chan->private; > - pair->dma_data.dma_request2 = tmp_data->dma_request; > - pair->dma_data.peripheral_type = tmp_data->peripheral_type; > - pair->dma_data.priority = tmp_data->priority; > - dma_release_channel(tmp_chan); > + if (tmp_chan) { > + tmp_data = tmp_chan->private; > + if (tmp_data) { Same question here. > + pair->dma_data.dma_request2 = tmp_data->dma_request; > + pair->dma_data.peripheral_type = > + tmp_data->peripheral_type; > + pair->dma_data.priority = tmp_data->priority; > + } > + dma_release_channel(tmp_chan); > + }