From: Andrew Lunn <andrew@lunn.ch>
To: Michael Walle <michael@walle.cc>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
netdev@vger.kernel.org
Subject: Re: [RFC PATCH 2/3] dt-bindings: net: phy: Add support for AT803X
Date: Thu, 31 Oct 2019 00:17:06 +0100 [thread overview]
Message-ID: <20191030231706.GG10555@lunn.ch> (raw)
In-Reply-To: <20191030224251.21578-3-michael@walle.cc>
On Wed, Oct 30, 2019 at 11:42:50PM +0100, Michael Walle wrote:
> Document the Atheros AR803x PHY bindings.
>
> Signed-off-by: Michael Walle <michael@walle.cc>
> ---
> .../bindings/net/atheros,at803x.yaml | 58 +++++++++++++++++++
> include/dt-bindings/net/atheros-at803x.h | 13 +++++
> 2 files changed, 71 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/atheros,at803x.yaml
> create mode 100644 include/dt-bindings/net/atheros-at803x.h
>
> diff --git a/Documentation/devicetree/bindings/net/atheros,at803x.yaml b/Documentation/devicetree/bindings/net/atheros,at803x.yaml
> new file mode 100644
> index 000000000000..60500fd90fd8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/atheros,at803x.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/atheros,at803x.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atheros AR803x PHY
> +
> +maintainers:
> + - TBD
Hi Michael
If you don't want to maintain it, then list the PHY maintainers.
> +
> +description: |
> + Bindings for Atheros AR803x PHYs
> +
> +allOf:
> + - $ref: ethernet-phy.yaml#
> +
> +properties:
> + atheros,clk-out-frequency:
> + description: Clock output frequency in Hertz.
> + enum: [ 25000000, 50000000, 62500000, 125000000 ]
> +
> + atheros,clk-out-strength:
> + description: Clock output driver strength.
> + enum: [ 0, 1, 2 ]
> +
> + atheros,keep-pll-enabled:
> + description: |
> + If set, keep the PLL enabled even if there is no link. Useful if you
> + want to use the clock output without an ethernet link.
> + type: boolean
> +
> + atheros,rgmii-io-1v8:
> + description: |
> + The PHY supports RGMII I/O voltages of 2.5V, 1.8V and 1.5V. By default,
> + the PHY uses a voltage of 1.5V. If this is set, the voltage will changed
> + to 1.8V.
> + The 2.5V voltage is only supported with an external supply voltage.
So we can later add atheros,rgmii-io-2v5. That might need a regulator
as well. Maybe add that 2.5V is currently not supported.
Andrew
next prev parent reply other threads:[~2019-10-30 23:17 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-30 22:42 [RFC PATCH 0/3] net: phy: at803x device tree binding Michael Walle
2019-10-30 22:42 ` [RFC PATCH 1/3] net: phy: at803x: fix Kconfig description Michael Walle
2019-10-30 23:13 ` Andrew Lunn
2019-10-30 23:16 ` Florian Fainelli
2019-10-30 23:18 ` Andrew Lunn
2019-10-30 23:32 ` Florian Fainelli
2019-10-31 0:05 ` Michael Walle
2019-10-30 22:42 ` [RFC PATCH 2/3] dt-bindings: net: phy: Add support for AT803X Michael Walle
2019-10-30 23:17 ` Andrew Lunn [this message]
2019-10-31 0:14 ` Michael Walle
2019-10-31 16:45 ` Florian Fainelli
2019-10-31 17:14 ` Michael Walle
2019-10-30 23:28 ` Florian Fainelli
2019-10-30 23:36 ` Michael Walle
2019-11-01 15:03 ` Simon Horman
2019-11-02 1:19 ` Michael Walle
2019-10-30 22:42 ` [RFC PATCH 3/3] net: phy: at803x: add device tree binding Michael Walle
2019-10-30 23:21 ` Andrew Lunn
2019-10-30 23:28 ` Florian Fainelli
2019-10-30 23:59 ` Michael Walle
2019-10-31 17:22 ` Michael Walle
2019-10-31 17:35 ` Florian Fainelli
2019-11-02 1:18 ` Michael Walle
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