From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20446C47E49 for ; Thu, 31 Oct 2019 19:58:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EA676216F4 for ; Thu, 31 Oct 2019 19:58:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=onstation.org header.i=@onstation.org header.b="lyAxphNj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727549AbfJaT6T (ORCPT ); Thu, 31 Oct 2019 15:58:19 -0400 Received: from onstation.org ([52.200.56.107]:60654 "EHLO onstation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726741AbfJaT6T (ORCPT ); Thu, 31 Oct 2019 15:58:19 -0400 Received: from localhost (c-98-239-145-235.hsd1.wv.comcast.net [98.239.145.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: masneyb) by onstation.org (Postfix) with ESMTPSA id 0726C3E94C; Thu, 31 Oct 2019 19:58:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=onstation.org; s=default; t=1572551897; bh=lpAg37b5Vwth+ogtYsoov8MBcpIvTZL2Kf6dlzNRaTo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=lyAxphNj+mdKM6qCi9armpKi1a1z4sQuWKvj0HvQsWBa40E4ePsTlpPWGDAgRNoUW w+4svYFMom/hJ6xjuQ7cuKh6wPMgcslVGLdqK6/VX2/bbg0YXgMuWgrtUx+JXoFcgX meS7SUZA2LfJVHB7QJ7dR2Apj2lE5H0yVmDP0jwY= Date: Thu, 31 Oct 2019 15:58:16 -0400 From: Brian Masney To: kholk11@gmail.com Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, ccross@android.com, mark.rutland@arm.com, robh+dt@kernel.org, agross@kernel.org, bjorn.andersson@linaro.org, marijns95@gmail.com, Linus Walleij Subject: Re: [PATCH v2 3/5] arm64: dts: qcom: Add configuration for PM8950 and PMI8950 peripherals Message-ID: <20191031195816.GA1462@onstation.org> References: <20191031111645.34777-1-kholk11@gmail.com> <20191031111645.34777-4-kholk11@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191031111645.34777-4-kholk11@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Thanks for the patches. Good to see the progress! On Thu, Oct 31, 2019 at 12:16:43PM +0100, kholk11@gmail.com wrote: > From: AngeloGioacchino Del Regno > > The PM(I)8950 feature integrated peripherals like ADC, GPIO > controller, MPPs, PON keys and others. > Add them to DT files that will be imported on boards having > this PMIC combo (or one of them, anyways). > > Signed-off-by: AngeloGioacchino Del Regno > --- > arch/arm64/boot/dts/qcom/pm8950.dtsi | 187 ++++++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/pmi8950.dtsi | 98 ++++++++++++++ > 2 files changed, 285 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/pm8950.dtsi > create mode 100644 arch/arm64/boot/dts/qcom/pmi8950.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/pm8950.dtsi b/arch/arm64/boot/dts/qcom/pm8950.dtsi > new file mode 100644 > index 000000000000..a349a8dd867e > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/pm8950.dtsi > @@ -0,0 +1,187 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// Copyright (c) 2019, AngeloGioacchino Del Regno > + > +#include > +#include > +#include > +#include > +#include > + > +&spmi_bus { > + pm8950_lsid0: pm8950@0 { > + compatible = "qcom,pm8950", "qcom,spmi-pmic"; > + reg = <0x0 SPMI_USID>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + pon@800 { > + compatible = "qcom,pm8916-pon"; > + reg = <0x0800>; > + mode-bootloader = <0x2>; > + mode-recovery = <0x1>; > + > + pwrkey { > + compatible = "qcom,pm8941-pwrkey"; > + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; > + debounce = <15625>; > + bias-pull-up; > + linux,code = ; > + }; > + }; > + > + pm8950_mpps: mpps@a000 { > + compatible = "qcom,pm8950-mpp", "qcom,spmi-mpp"; > + reg = <0xa000>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupts = <0 0xa0 0 IRQ_TYPE_NONE>, > + <0 0xa1 0 IRQ_TYPE_NONE>, > + <0 0xa2 0 IRQ_TYPE_NONE>, > + <0 0xa3 0 IRQ_TYPE_NONE>; > + > + /* MPP_2: PA_THERM1 */ > + pa_therm { > + pm8950_mpp2_def: pa_therm1_default { > + pins = "mpp2"; > + function = "analog"; > + input-enable; > + qcom,amux-route = > + ; > + }; > + }; > + > + /* MPP_4: QUIET_THERM */ > + case_therm { > + pm8950_mpp4_def: case_therm_default { > + pins = "mpp4"; > + function = "analog"; > + input-enable; > + qcom,amux-route = > + ; > + }; > + }; > + }; > + > + pm8950_gpios: gpio@c000 { > + compatible = "qcom,pm8950-gpio", "qcom,spmi-gpio"; > + reg = <0xc000>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupts = <0 0xc0 0 IRQ_TYPE_NONE>, > + <0 0xc1 0 IRQ_TYPE_NONE>, > + <0 0xc3 0 IRQ_TYPE_NONE>, > + <0 0xc4 0 IRQ_TYPE_NONE>, > + <0 0xc5 0 IRQ_TYPE_NONE>, > + <0 0xc6 0 IRQ_TYPE_NONE>, > + <0 0xc7 0 IRQ_TYPE_NONE>; > + }; Please add gpio-ranges so that gpio-hogging will work properly. See commits for pm8941 and spmi-gpio that describes the problem and how to fix it: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=149a96047237574b756d872007c006acd0cc6687 https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=cdd3d64d843a2a4c658a182b744bfefbd021d542 Please drop the interrupts property and configure this to be a hierarchical IRQ chip. See these two commits for more details: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ca69e2d165eb3d060cc9ad70a745e27a2cf4310b https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=5f540fb4821a5444350ab3311fff60013d755d8f There is some kind of mask that you'll need to add to omit 0xc2 that Linus Walleij told me about before. I don't have the property handy right now, but can look it up later if needed. Brian