From: Andrew Lunn <andrew@lunn.ch>
To: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: Shawn Guo <shawnguo@kernel.org>, Li Yang <leoyang.li@nxp.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Vladimir Oltean <olteanv@gmail.com>,
Marc Zyngier <maz@kernel.org>,
netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs
Date: Thu, 14 Nov 2019 16:28:48 +0100 [thread overview]
Message-ID: <20191114152848.GR10875@lunn.ch> (raw)
In-Reply-To: <20191114110254.32171-3-linux@rasmusvillemoes.dk>
On Thu, Nov 14, 2019 at 12:02:53PM +0100, Rasmus Villemoes wrote:
> From: Vladimir Oltean <olteanv@gmail.com>
>
> On the LS1021A-TSN board, the 2 Atheros AR8031 PHYs for eth0 and eth1
> have interrupt lines connected to the shared IRQ2_B LS1021A pin.
>
> Switching to interrupts offloads the PHY library from the task of
> polling the MDIO status and AN registers (1, 4, 5) every second.
>
> Unfortunately, the BCM5464R quad PHY connected to the switch does not
> appear to have an interrupt line routed to the SoC.
>
> Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2019-11-14 15:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-14 11:02 [PATCH v2 0/2] ARM: dts: ls1021a: define and use external interrupt lines Rasmus Villemoes
2019-11-14 11:02 ` [PATCH v2 1/2] ARM: dts: ls1021a: add node describing " Rasmus Villemoes
2019-11-14 11:02 ` [PATCH v2 2/2] ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs Rasmus Villemoes
2019-11-14 15:28 ` Andrew Lunn [this message]
2019-11-14 21:39 ` [PATCH v2 0/2] ARM: dts: ls1021a: define and use external interrupt lines David Miller
2019-11-14 21:53 ` Vladimir Oltean
2019-12-04 13:14 ` Shawn Guo
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