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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id q3sm2171825oti.49.2019.11.14.13.12.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Nov 2019 13:12:38 -0800 (PST) Date: Thu, 14 Nov 2019 15:12:37 -0600 From: Rob Herring To: Shengjiu Wang Cc: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Subject: Re: [PATCH V3 1/2] ASoC: dt-bindings: fsl_asrc: add compatible string for imx8qm Message-ID: <20191114211237.GA25375@bogus> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Nov 11, 2019 at 05:18:22PM +0800, Shengjiu Wang wrote: > Add compatible string "fsl,imx8qm-asrc" for imx8qm platform. > > There are two asrc modules in imx8qm, the clock mapping is > different for each other, so add new property "fsl,asrc-clk-map" > to distinguish them. What's the clock mapping? > Signed-off-by: Shengjiu Wang > --- > changes in v2 > -none > > changes in v3 > -use only one compatible string "fsl,imx8qm-asrc", > -add new property "fsl,asrc-clk-map". > > Documentation/devicetree/bindings/sound/fsl,asrc.txt | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/sound/fsl,asrc.txt b/Documentation/devicetree/bindings/sound/fsl,asrc.txt > index 1d4d9f938689..02edab7cf3e0 100644 > --- a/Documentation/devicetree/bindings/sound/fsl,asrc.txt > +++ b/Documentation/devicetree/bindings/sound/fsl,asrc.txt > @@ -8,7 +8,8 @@ three substreams within totally 10 channels. > > Required properties: > > - - compatible : Contains "fsl,imx35-asrc" or "fsl,imx53-asrc". > + - compatible : Contains "fsl,imx35-asrc", "fsl,imx53-asrc", > + "fsl,imx8qm-asrc". > > - reg : Offset and length of the register set for the device. > > @@ -35,6 +36,13 @@ Required properties: > > - fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends. > > + - fsl,asrc-clk-map : Defines clock map used in driver. which is required > + by imx8qm/imx8qxp platform > + <0> - select the map for asrc0 in imx8qm > + <1> - select the map for asrc1 in imx8qm > + <2> - select the map for asrc0 in imx8qxp > + <3> - select the map for asrc1 in imx8qxp Is this 4 modes of the h/w or just selecting 1 of 4 settings defined in the driver? How does one decide? This seems strange. imx8qxp should perhaps be a separate compatible. Then you only need 1 of 2 modes... Rob