From: Fabio Estevam <festevam@gmail.com>
To: shawnguo@kernel.org
Cc: robh+dt@kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
Fabio Estevam <festevam@gmail.com>
Subject: [PATCH RESEND v2 2/2] ARM: dts: imx7ulp-com: Add initial support for i.MX7UP COM board
Date: Mon, 2 Dec 2019 10:13:18 -0300 [thread overview]
Message-ID: <20191202131318.11404-2-festevam@gmail.com> (raw)
In-Reply-To: <20191202131318.11404-1-festevam@gmail.com>
The Embedded Artists COM board is based on NXP i.MX7ULP.
It has a BD70528 PMIC from Rohm with discrete DCDC powering option and
improved current observability (compared to the existing NXP i.MX7ULP EVK).
Add the initial support for the board.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- Fix W=1 dtc warning:
arch/arm/boot/dts/imx7ulp-com.dts:18.9-21.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx7ulp-com.dts | 79 +++++++++++++++++++++++++++++++
2 files changed, 80 insertions(+)
create mode 100644 arch/arm/boot/dts/imx7ulp-com.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e352598c05ae..07949ad31a6b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -611,6 +611,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7s-mba7.dtb \
imx7s-warp.dtb
dtb-$(CONFIG_SOC_IMX7ULP) += \
+ imx7ulp-com.dtb \
imx7ulp-evk.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-moxa-uc-8410a.dtb \
diff --git a/arch/arm/boot/dts/imx7ulp-com.dts b/arch/arm/boot/dts/imx7ulp-com.dts
new file mode 100644
index 000000000000..c0ff354730ba
--- /dev/null
+++ b/arch/arm/boot/dts/imx7ulp-com.dts
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright 2019 NXP
+
+/dts-v1/;
+
+#include "imx7ulp.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Embedded Artists i.MX7ULP COM";
+ compatible = "ea,imx7ulp-com", "fsl,imx7ulp";
+
+ chosen {
+ stdout-path = &lpuart4;
+ };
+
+ memory@60000000 {
+ device_type = "memory";
+ reg = <0x60000000 0x4000000>;
+ };
+};
+
+&lpuart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart4>;
+ status = "okay";
+};
+
+&usbotg1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1_id>;
+ srp-disable;
+ hnp-disable;
+ adp-disable;
+ status = "okay";
+};
+
+&usdhc0 {
+ assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
+ assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc0>;
+ non-removable;
+ bus-width = <8>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&iomuxc1 {
+ pinctrl_lpuart4: lpuart4grp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTC3__LPUART4_RX 0x3
+ IMX7ULP_PAD_PTC2__LPUART4_TX 0x3
+ >;
+ };
+
+ pinctrl_usbotg1_id: otg1idgrp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTC13__USB0_ID 0x10003
+ >;
+ };
+
+ pinctrl_usdhc0: usdhc0grp {
+ fsl,pins = <
+ IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43
+ IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042
+ IMX7ULP_PAD_PTD3__SDHC0_D7 0x43
+ IMX7ULP_PAD_PTD4__SDHC0_D6 0x43
+ IMX7ULP_PAD_PTD5__SDHC0_D5 0x43
+ IMX7ULP_PAD_PTD6__SDHC0_D4 0x43
+ IMX7ULP_PAD_PTD7__SDHC0_D3 0x43
+ IMX7ULP_PAD_PTD8__SDHC0_D2 0x43
+ IMX7ULP_PAD_PTD9__SDHC0_D1 0x43
+ IMX7ULP_PAD_PTD10__SDHC0_D0 0x43
+ IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42
+ >;
+ };
+};
--
2.17.1
next prev parent reply other threads:[~2019-12-02 13:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-02 13:13 [PATCH v2 RESEND 1/2] dt-bindings: arm: fsl: Document i.MX7ULP Embedded Artists COM board Fabio Estevam
2019-12-02 13:13 ` Fabio Estevam [this message]
2019-12-11 2:28 ` Shawn Guo
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