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[73.37.219.234]) by smtp.gmail.com with ESMTPSA id v38sm3984694ywh.63.2019.12.13.08.05.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Dec 2019 08:06:00 -0800 (PST) From: Adam Ford To: linux-arm-kernel@lists.infradead.org Cc: peng.fan@nxp.com, ping.bai@nxp.com, Adam Ford , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 5/7] arm64: dts: imx8mm: add GPC power domains Date: Fri, 13 Dec 2019 10:05:40 -0600 Message-Id: <20191213160542.15757-6-aford173@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191213160542.15757-1-aford173@gmail.com> References: <20191213160542.15757-1-aford173@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is a power domain controller on the i.XM8M Mini used for handling interrupts and controlling certain peripherals like USB OTG and PCIe, which are currently unavailable. This patch enables support the controller itself to the help facilitate enabling additional peripherals. Signed-off-by: Adam Ford --- V2: Removed references making GPC an interrupt controller. arch/arm64/boot/dts/freescale/imx8mm.dtsi | 78 +++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 23c8fad7932b..f38bed94bce2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -495,6 +496,83 @@ interrupts = ; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mm-gpc"; + reg = <0x303a0000 0x10000>; + interrupt-parent = <&gic>; + interrupts = ; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_mipi: power-domain@0 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_pcie: power-domain@1 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_otg1: power-domain@2 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_otg2: power-domain@3 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_ddr1: power-domain@4 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_gpu2d: power-domain@5 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_gpu: power-domain@6 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu: power-domain@7 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_gpu3d: power-domain@8 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_disp: power-domain@9 { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu_g1: power-domain@a { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu_g2: power-domain@b { + #power-domain-cells = <0>; + reg = ; + }; + + pgc_vpu_h1: power-domain@c { + #power-domain-cells = <0>; + reg = ; + }; + }; + }; }; aips2: bus@30400000 { -- 2.20.1