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Fri, 13 Dec 2019 11:19:28 -0500 (EST) Date: Fri, 13 Dec 2019 17:19:25 +0100 From: Maxime Ripard To: Frank Lee Cc: Mark Rutland , Rob Herring , Frank Rowand , Chen-Yu Tsai , devicetree , Linux ARM , georgi.djakov@linaro.org, Linux PM Subject: Re: [PATCH] dt-bindings: interconnect: Convert Allwinner MBUS controller to a schema Message-ID: <20191213161925.33zaksfs5qnfmsdg@gilmour.lan> References: <20191213074533.27048-1-maxime@cerno.tech> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="dm365wf27dl23ps2" Content-Disposition: inline In-Reply-To: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --dm365wf27dl23ps2 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Dec 13, 2019 at 11:41:46PM +0800, Frank Lee wrote: > On Fri, Dec 13, 2019 at 3:45 PM Maxime Ripard wrote: > > > > The older Allwinner SoCs have an MBUS controller that is used by Linux, > > with a matching Device Tree binding. > > > > Now that we have the DT validation in place, let's convert the device tree > > bindings for that controller over to a YAML schemas. > > > > Signed-off-by: Maxime Ripard > > --- > > .../arm/sunxi/allwinner,sun4i-a10-mbus.yaml | 65 +++++++++++++++++++ > > .../bindings/arm/sunxi/sunxi-mbus.txt | 37 ----------- > > 2 files changed, 65 insertions(+), 37 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml > > delete mode 100644 Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt > > > > diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml > > new file mode 100644 > > index 000000000000..9370e64992dd > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml > > @@ -0,0 +1,65 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun4i-a10-mbus.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Allwinner Memory Bus (MBUS) controller > > + > > +maintainers: > > + - Chen-Yu Tsai > > + - Maxime Ripard > > + > > +description: | > > + The MBUS controller drives the MBUS that other devices in the SoC > > + will use to perform DMA. It also has a register interface that > > + allows to monitor and control the bandwidth and priorities for > > + masters on that bus. > > + > > + Each device having to perform their DMA through the MBUS must have > > + the interconnects and interconnect-names properties set to the MBUS > > + controller and with "dma-mem" as the interconnect name. > > + > > +properties: > > + "#interconnect-cells": > > + const: 1 > > + description: > > + The content of the cell is the MBUS ID. > > + > > + compatible: > > + enum: > > + - allwinner,sun5i-a13-mbus > > + - allwinner,sun8i-h3-mbus > > Is there a driver in mainline for it? Not at teh moment no, it's sole use is to have the proper DMA address translation. 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