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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id a69sm1300253pfa.129.2019.12.17.22.28.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2019 22:28:27 -0800 (PST) Date: Tue, 17 Dec 2019 22:28:25 -0800 From: Bjorn Andersson To: Victhor Foster Cc: linux-arm-msm@vger.kernel.org, agross@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Subject: Re: [PATCH] arm: dts: apq8084: Fix tsens kernel panic during boot and kernel warnings due to IRQ_TYPE_NONE interrupt type Message-ID: <20191218062825.GA3755841@builder> References: <587764682.8806511.1576626759806.JavaMail.zimbra@ufpe.br> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <587764682.8806511.1576626759806.JavaMail.zimbra@ufpe.br> User-Agent: Mutt/1.12.2 (2019-09-21) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue 17 Dec 15:52 PST 2019, Victhor Foster wrote: > This patch fixes a kernel panic on the tsens driver that prevented APQ8084 platforms from booting, by adding a missing register property and the number of sensors I was under the impression that the tsens driver did maintain backwards compatibility wrt a single reg cell... > , corrects all instances of IRQ_TYPE_NONE in interrupts, to avoid causing kernel warnings during boot, and also changes most interrupt properties to their respective macros, as defined by arm-gic.h. > > Signed-off by: Victhor Foster The content looks good, but can you please split it in two; one for the tsens change and one for the interrupts cells? And please limit your commit message to 72 chars. Thanks, Bjorn > --- > arch/arm/boot/dts/qcom-apq8084.dtsi | 43 +++++++++++++++-------------- > 1 file changed, 23 insertions(+), 20 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi > index 0a0fb147ebb9..dc4ea3a8dc6d 100644 > --- a/arch/arm/boot/dts/qcom-apq8084.dtsi > +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0 > /dts-v1/; > > +#include > #include > #include > > @@ -184,7 +185,7 @@ > > cpu-pmu { > compatible = "qcom,krait-pmu"; > - interrupts = <1 7 0xf04>; > + interrupts = ; > }; > > clocks { > @@ -203,10 +204,10 @@ > > timer { > compatible = "arm,armv7-timer"; > - interrupts = <1 2 0xf08>, > - <1 3 0xf08>, > - <1 4 0xf08>, > - <1 1 0xf08>; > + interrupts = , > + , > + , > + ; > clock-frequency = <19200000>; > }; > > @@ -253,9 +254,11 @@ > > tsens: thermal-sensor@fc4a8000 { > compatible = "qcom,msm8974-tsens"; > - reg = <0xfc4a8000 0x2000>; > + reg = <0xfc4a9000 0x1000>, /* TM */ > + <0xfc4a8000 0x1000>; /* SROT */ > nvmem-cells = <&tsens_calib>, <&tsens_backup>; > nvmem-cell-names = "calib", "calib_backup"; > + #qcom,sensors = <11>; > #thermal-sensor-cells = <1>; > }; > > @@ -269,50 +272,50 @@ > > frame@f9021000 { > frame-number = <0>; > - interrupts = <0 8 0x4>, > - <0 7 0x4>; > + interrupts = , > + ; > reg = <0xf9021000 0x1000>, > <0xf9022000 0x1000>; > }; > > frame@f9023000 { > frame-number = <1>; > - interrupts = <0 9 0x4>; > + interrupts = ; > reg = <0xf9023000 0x1000>; > status = "disabled"; > }; > > frame@f9024000 { > frame-number = <2>; > - interrupts = <0 10 0x4>; > + interrupts = ; > reg = <0xf9024000 0x1000>; > status = "disabled"; > }; > > frame@f9025000 { > frame-number = <3>; > - interrupts = <0 11 0x4>; > + interrupts = ; > reg = <0xf9025000 0x1000>; > status = "disabled"; > }; > > frame@f9026000 { > frame-number = <4>; > - interrupts = <0 12 0x4>; > + interrupts = ; > reg = <0xf9026000 0x1000>; > status = "disabled"; > }; > > frame@f9027000 { > frame-number = <5>; > - interrupts = <0 13 0x4>; > + interrupts = ; > reg = <0xf9027000 0x1000>; > status = "disabled"; > }; > > frame@f9028000 { > frame-number = <6>; > - interrupts = <0 14 0x4>; > + interrupts = ; > reg = <0xf9028000 0x1000>; > status = "disabled"; > }; > @@ -404,13 +407,13 @@ > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - interrupts = <0 208 0>; > + interrupts = ; > }; > > blsp2_uart2: serial@f995e000 { > compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; > reg = <0xf995e000 0x1000>; > - interrupts = <0 114 0x0>; > + interrupts = ; > clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; > clock-names = "core", "iface"; > status = "disabled"; > @@ -420,7 +423,7 @@ > compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; > reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; > reg-names = "hc_mem", "core_mem"; > - interrupts = <0 123 0>, <0 138 0>; > + interrupts = , ; > interrupt-names = "hc_irq", "pwr_irq"; > clocks = <&gcc GCC_SDCC1_APPS_CLK>, > <&gcc GCC_SDCC1_AHB_CLK>, > @@ -433,7 +436,7 @@ > compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; > reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; > reg-names = "hc_mem", "core_mem"; > - interrupts = <0 125 0>, <0 221 0>; > + interrupts = , ; > interrupt-names = "hc_irq", "pwr_irq"; > clocks = <&gcc GCC_SDCC2_APPS_CLK>, > <&gcc GCC_SDCC2_AHB_CLK>, > @@ -449,7 +452,7 @@ > <0xfc4cb000 0x1000>, > <0xfc4ca000 0x1000>; > interrupt-names = "periph_irq"; > - interrupts = <0 190 0>; > + interrupts = ; > qcom,ee = <0>; > qcom,channel = <0>; > #address-cells = <2>; > @@ -463,7 +466,7 @@ > compatible = "qcom,smd"; > > rpm { > - interrupts = <0 168 1>; > + interrupts = ; > qcom,ipc = <&apcs 8 0>; > qcom,smd-edge = <15>; > > -- > 2.24.0