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[184.205.174.147]) by smtp.gmail.com with ESMTPSA id m68sm2525707oig.50.2019.12.19.15.35.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2019 15:35:27 -0800 (PST) Date: Thu, 19 Dec 2019 17:35:25 -0600 From: Rob Herring To: Lad Prabhakar Cc: Bjorn Helgaas , Mark Rutland , Geert Uytterhoeven , Magnus Damm , Kishon Vijay Abraham I , Marek Vasut , Yoshihiro Shimoda , linux-pci@vger.kernel.org, Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Arnd Bergmann , Greg Kroah-Hartman , Andrew Murray , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Chris Paterson , Frank Rowand , Gustavo Pimentel , Jingoo Han , Simon Horman , Shawn Lin , Tom Joseph , Heiko Stuebner , linux-rockchip@lists.infradead.org, "Lad, Prabhakar" Subject: Re: [v2 4/6] dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller Message-ID: <20191219233525.GA9478@bogus> References: <20191213084748.11210-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20191213084748.11210-5-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191213084748.11210-5-prabhakar.mahadev-lad.rj@bp.renesas.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, Dec 13, 2019 at 08:47:46AM +0000, Lad Prabhakar wrote: > From: "Lad, Prabhakar" > > This patch adds the bindings for the R-Car PCIe endpoint driver. > > Signed-off-by: Lad, Prabhakar > --- > .../devicetree/bindings/pci/rcar-pci-ep.txt | 37 ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci-ep.txt Please make this a DT schema. > > diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt b/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt > new file mode 100644 > index 0000000..7f0a97e > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt > @@ -0,0 +1,37 @@ > +* Renesas R-Car PCIe Endpoint Controller DT description > + > +Required properties: > + "renesas,pcie-ep-r8a774c0" for the R8A774C0 SoC; Normal ordering is: renesas,r8a774c0-pcie-ep > + "renesas,pcie-ep-rcar-gen3" for a generic R-Car Gen3 or > + RZ/G2 compatible device. > + > + When compatible with the generic version, nodes must list the > + SoC-specific version corresponding to the platform first > + followed by the generic version. > + > +- reg: base address and length of the PCIe controller registers. > +- outbound-ranges: outbound windows base address and length including the flags. > +- resets: Must contain phandles to PCIe-related reset lines exposed by IP block How many? > +- clocks: from common clock binding: clock specifiers for the PCIe controller > + clock. > +- clock-names: from common clock binding: should be "pcie". > + > +Optional Property: > +- max-functions: Maximum number of functions that can be configured (default 1). > + > +Example: > + > +SoC-specific DT Entry: > + > + pcie_ep: pcie_ep@fe000000 { pcie-ep@ > + compatible = "renesas,pcie-ep-r8a774c0", "renesas,pcie-rcar-gen2"; > + reg = <0 0xfe000000 0 0x80000>; > + outbound-ranges = <0xa 0x0 0xfe100000 0 0x000100000 > + 0xa 0x0 0xfe200000 0 0x000200000 > + 0x6 0x0 0x30000000 0 0x008000000 > + 0x6 0x0 0x38000000 0 0x008000000>; > + clocks = <&cpg CPG_MOD 319>; > + clock-names = "pcie"; > + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; > + resets = <&cpg 319>; > + }; > -- > 2.7.4 >