Re: [PATCH 1/2] dt-bindings: ath10k: Add new dt entries to identify coex support

[Rob Herring <robh@kernel.org>]

On Mon, Dec 16, 2019 at 05:10:14PM +0530, Tamizh Chelvam wrote:
> This adds new dt entries qcom,coexist-support and qcom,coexist-gpio-pin
> which will be used by ath10k driver to identify coex support
> of a hardware and notify wifi firmware the gpio pin number.
> This pin number information is needed for the hardware QCA4019.
> 
> Signed-off-by: Tamizh Chelvam <tamizhr@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt
> index 0171283..a41e936 100644
> --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt
> +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt
> @@ -87,6 +87,10 @@ Optional properties:
>  	Definition: Quirk specifying that the firmware expects the 8bit version
>  		    of the host capability QMI request
>  - qcom,xo-cal-data: xo cal offset to be configured in xo trim register.
> +- qcom,coexist-support : should contain eithr "0" or "1" to indicate coex
> +			 support by the hardware.
> +- qcom,coexist-gpio-pin : gpio pin number  information to support coex
> +			  which will be used by wifi firmware.

What combinations of these 2 properties are valid?

Is qcom,coexist-gpio-pin required for coexist support? If so then it 
alone should be enough to enable/disable coexist.

>  
>  Example (to supply PCI based wifi block details):
>  
> @@ -156,6 +160,8 @@ wifi0: wifi@a000000 {
>  	qcom,msi_addr = <0x0b006040>;
>  	qcom,msi_base = <0x40>;
>  	qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
> +	qcom,coexist-support = <1>;
> +	qcom,coexist-gpio-pin = <0x33>;
>  };
>  
>  Example (to supply wcn3990 SoC wifi block details):
> -- 
> 1.9.1