From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CDB2C2D0D1 for ; Sun, 29 Dec 2019 02:51:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0ED4B206F4 for ; Sun, 29 Dec 2019 02:51:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="DgCUI/QK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726187AbfL2Cvn (ORCPT ); Sat, 28 Dec 2019 21:51:43 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:42040 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726293AbfL2Cvn (ORCPT ); Sat, 28 Dec 2019 21:51:43 -0500 Received: by mail-pf1-f193.google.com with SMTP id 4so16679874pfz.9 for ; Sat, 28 Dec 2019 18:51:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=lWvbdmgw5+0Kgfn29wsDIzOWOFPb80gRZ1Wrt5sVywo=; b=DgCUI/QKpT9hccWASQUnnS9++Ie0vAMVNtm75cIE0RUI6nJQhqT0ioiqHj1ytXsZgd SIl+nDy3VQSf3iQ68h18bjIfMbs5XX5ZbV5yJGfI5yZ5AsfqSikVyzQ69+IKmzv8e2sp HhTcZN2HIU2JxzzeRSnAUhyaiT2dtLL9Ard65tqLyuD6K7VeIwEGdL4tUC/DwsM3M7Nx CHUOFY4ATQaIMpx1tdGc5irLzZs+7cjPV74Luy3LhoiBWlW+gAcNtDigFXqxpJbUC8UH ZIyj8Y1GcCKudN00HO0O8FmGHIqR2mSw2sHlrCAmX9GC7yWMT0efAGki3yQBJdOcEjrY AUtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=lWvbdmgw5+0Kgfn29wsDIzOWOFPb80gRZ1Wrt5sVywo=; b=o8sVbnUvL1qWQYCXAuEiJrEPq3CINvxHDS6KlEKE4BZUvXUqyDl648yi9K96WZKBSC DUMaLJKr1SLonlroGIeHyJO1YmVqYzo+vAVK+uzA7m2AMUey6PA3M3U5su/yUr+MQ/E3 8zCy5JoKkHkmQxAOK8eJlMDLLqgQhb6/+dA7lj3LhuOnhTEfGROy6PBE0y/5mzKRCmO9 xTXUKaAQeTNtM5Q0h2HhmC4Zsp6x4maVKViOM+wqDfhWUhAVosQ4c9xx7O3Md0KL0DdD GbdIGvAGJrtGccvWWQX1L3xRKYQPANjO0OALf9ZYaS0iTy+NxbqklmgxpksEnm6Owv7F 2UQw== X-Gm-Message-State: APjAAAUzEc29VDMtXpMQo8rn9zP84JBJlgo0PQXDRSgKPUOUmYW8F1fC Es/LU9T5XdtY7GimujShonysTQ== X-Google-Smtp-Source: APXvYqzdUYshGfVEKkyY06qz6UNtTZPi2CJOh1TLjleWUGSf/p/FhSBRjC1iSOHou0Jj5Q7gAGc2/Q== X-Received: by 2002:aa7:9218:: with SMTP id 24mr62727996pfo.145.1577587902245; Sat, 28 Dec 2019 18:51:42 -0800 (PST) Received: from builder (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id y203sm25524258pfb.65.2019.12.28.18.51.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 18:51:41 -0800 (PST) Date: Sat, 28 Dec 2019 18:51:39 -0800 From: Bjorn Andersson To: Victhor Foster Cc: linux-arm-msm , agross , robh+dt , mark rutland , devicetree Subject: Re: [PATCH] arm: dts: apq8084: Remove all instances of IRQ_TYPE_NONE Message-ID: <20191229025139.GI3755841@builder> References: <1723137502.9510958.1577059595123.JavaMail.zimbra@ufpe.br> <1238987932.9511963.1577060836760.JavaMail.zimbra@ufpe.br> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1238987932.9511963.1577060836760.JavaMail.zimbra@ufpe.br> User-Agent: Mutt/1.12.2 (2019-09-21) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Sun 22 Dec 16:27 PST 2019, Victhor Foster wrote: > This patch removes all instances of IRQ_TYPE_NONE, which fixes warning messages during boot. It also changes interrupt types to their corresponding macros, as defined in arm-gic.h. > > Signed-off by: Victhor Foster Thanks for fixing this up Victhor. I've applied both patches, with the commit message wrapped to 72 chars. Regards, Bjorn > --- > arch/arm/boot/dts/qcom-apq8084.dtsi | 40 ++++++++++++++--------------- > 1 file changed, 20 insertions(+), 20 deletions(-) > > diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi > index 0a0fb147ebb9..1724a87afc4f 100644 > --- a/arch/arm/boot/dts/qcom-apq8084.dtsi > +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0 > /dts-v1/; > > +#include > #include > #include > > @@ -184,7 +185,7 @@ cpu_crit3: trip1 { > > cpu-pmu { > compatible = "qcom,krait-pmu"; > - interrupts = <1 7 0xf04>; > + interrupts = ; > }; > > clocks { > @@ -203,10 +204,10 @@ sleep_clk: sleep_clk { > > timer { > compatible = "arm,armv7-timer"; > - interrupts = <1 2 0xf08>, > - <1 3 0xf08>, > - <1 4 0xf08>, > - <1 1 0xf08>; > + interrupts = , > + , > + , > + ; > clock-frequency = <19200000>; > }; > > @@ -258,7 +259,6 @@ tsens: thermal-sensor@fc4a8000 { > nvmem-cell-names = "calib", "calib_backup"; > #thermal-sensor-cells = <1>; > }; > - > timer@f9020000 { > #address-cells = <1>; > #size-cells = <1>; > @@ -269,50 +269,50 @@ timer@f9020000 { > > frame@f9021000 { > frame-number = <0>; > - interrupts = <0 8 0x4>, > - <0 7 0x4>; > + interrupts = , > + ; > reg = <0xf9021000 0x1000>, > <0xf9022000 0x1000>; > }; > > frame@f9023000 { > frame-number = <1>; > - interrupts = <0 9 0x4>; > + interrupts = ; > reg = <0xf9023000 0x1000>; > status = "disabled"; > }; > > frame@f9024000 { > frame-number = <2>; > - interrupts = <0 10 0x4>; > + interrupts = ; > reg = <0xf9024000 0x1000>; > status = "disabled"; > }; > > frame@f9025000 { > frame-number = <3>; > - interrupts = <0 11 0x4>; > + interrupts = ; > reg = <0xf9025000 0x1000>; > status = "disabled"; > }; > > frame@f9026000 { > frame-number = <4>; > - interrupts = <0 12 0x4>; > + interrupts = ; > reg = <0xf9026000 0x1000>; > status = "disabled"; > }; > > frame@f9027000 { > frame-number = <5>; > - interrupts = <0 13 0x4>; > + interrupts = ; > reg = <0xf9027000 0x1000>; > status = "disabled"; > }; > > frame@f9028000 { > frame-number = <6>; > - interrupts = <0 14 0x4>; > + interrupts = ; > reg = <0xf9028000 0x1000>; > status = "disabled"; > }; > @@ -404,13 +404,13 @@ tlmm: pinctrl@fd510000 { > #gpio-cells = <2>; > interrupt-controller; > #interrupt-cells = <2>; > - interrupts = <0 208 0>; > + interrupts = ; > }; > > blsp2_uart2: serial@f995e000 { > compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; > reg = <0xf995e000 0x1000>; > - interrupts = <0 114 0x0>; > + interrupts = ; > clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; > clock-names = "core", "iface"; > status = "disabled"; > @@ -420,7 +420,7 @@ sdhci@f9824900 { > compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; > reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; > reg-names = "hc_mem", "core_mem"; > - interrupts = <0 123 0>, <0 138 0>; > + interrupts = , ; > interrupt-names = "hc_irq", "pwr_irq"; > clocks = <&gcc GCC_SDCC1_APPS_CLK>, > <&gcc GCC_SDCC1_AHB_CLK>, > @@ -433,7 +433,7 @@ sdhci@f98a4900 { > compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; > reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; > reg-names = "hc_mem", "core_mem"; > - interrupts = <0 125 0>, <0 221 0>; > + interrupts = , ; > interrupt-names = "hc_irq", "pwr_irq"; > clocks = <&gcc GCC_SDCC2_APPS_CLK>, > <&gcc GCC_SDCC2_AHB_CLK>, > @@ -449,7 +449,7 @@ spmi_bus: spmi@fc4cf000 { > <0xfc4cb000 0x1000>, > <0xfc4ca000 0x1000>; > interrupt-names = "periph_irq"; > - interrupts = <0 190 0>; > + interrupts = ; > qcom,ee = <0>; > qcom,channel = <0>; > #address-cells = <2>; > @@ -463,7 +463,7 @@ smd { > compatible = "qcom,smd"; > > rpm { > - interrupts = <0 168 1>; > + interrupts = ; > qcom,ipc = <&apcs 8 0>; > qcom,smd-edge = <15>; > > -- > 2.24.0