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From: Rob Herring <robh@kernel.org>
To: Khouloud Touil <ktouil@baylibre.com>
Cc: bgolaszewski@baylibre.com, mark.rutland@arm.com,
	srinivas.kandagatla@linaro.org, baylibre-upstreaming@groups.io,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-i2c@vger.kernel.org, linus.walleij@linaro.org
Subject: Re: [PATCH v3 1/4] dt-bindings: nvmem: new optional property write-protect-gpios
Date: Fri, 3 Jan 2020 16:40:42 -0700	[thread overview]
Message-ID: <20200103234042.GA14976@bogus> (raw)
In-Reply-To: <20191219115141.24653-2-ktouil@baylibre.com>

On Thu, Dec 19, 2019 at 12:51:38PM +0100, Khouloud Touil wrote:
> Several memories have a write-protect pin, that when pulled high, it
> blocks the write operation.

Subject doesn't match the actual property name.

> 
> On some boards, this pin is connected to a GPIO and pulled high by
> default, which forces the user to manually change its state before
> writing.
> 
> Instead of modifying all the memory drivers to check this pin, make
> the NVMEM subsystem check if the write-protect GPIO being passed
> through the nvmem_config or defined in the device tree and pull it
> low whenever writing to the memory.
> 
> Add a new optional property to the device tree binding document, which
> allows to specify the GPIO line to which the write-protect pin is
> connected.
> 
> Signed-off-by: Khouloud Touil <ktouil@baylibre.com>
> ---
>  Documentation/devicetree/bindings/nvmem/nvmem.yaml | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> index 1c75a059206c..b43c6c65294e 100644
> --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
> @@ -34,6 +34,14 @@ properties:
>      description:
>        Mark the provider as read only.
>  
> +  wp-gpios:
> +    description:
> +      GPIO to which the write-protect pin of the chip is connected.
> +      The write-protect GPIO is asserted, when it's driven high
> +      (logical '1') to block the write operation. It's deasserted,
> +      when it's driven low (logical '0') to allow writing.
> +    maxItems: 1
> +
>  patternProperties:
>    "^.*@[0-9a-f]+$":
>      type: object
> @@ -63,9 +71,12 @@ patternProperties:
>  
>  examples:
>    - |
> +      #include <dt-bindings/gpio/gpio.h>
> +
>        qfprom: eeprom@700000 {
>            #address-cells = <1>;
>            #size-cells = <1>;
> +          wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
>  
>            /* ... */
>  
> -- 
> 2.17.1
> 

  reply	other threads:[~2020-01-03 23:40 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-19 11:51 [PATCH v3 0/4] at24: move write-protect pin handling to nvmem core Khouloud Touil
2019-12-19 11:51 ` [PATCH v3 1/4] dt-bindings: nvmem: new optional property write-protect-gpios Khouloud Touil
2020-01-03 23:40   ` Rob Herring [this message]
2019-12-19 11:51 ` [PATCH v3 2/4] nvmem: add support for the write-protect pin Khouloud Touil
2019-12-19 11:51 ` [PATCH v3 3/4] dt-bindings: at24: remove the optional property write-protect-gpios Khouloud Touil
2020-01-03 23:44   ` Rob Herring
2019-12-19 11:51 ` [PATCH v3 4/4] eeprom: at24: remove the write-protect pin support Khouloud Touil

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