From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Rob Herring <robh+dt@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Andrew Murray <andrew.murray@arm.com>
Cc: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v2 00/14] Add PCIe support to TI's J721E SoC
Date: Mon, 6 Jan 2020 15:50:44 +0530 [thread overview]
Message-ID: <20200106102058.19183-1-kishon@ti.com> (raw)
TI's J721E SoC uses Cadence PCIe core to implement both RC mode
and EP mode.
The high level features are:
*) Supports Legacy, MSI and MSI-X interrupt
*) Supports upto GEN4 speed mode
*) Supports SR-IOV
*) Supports multiple physical function
*) Ability to route all transactions via SMMU
This patch series
*) Add support in Cadence PCIe core to be used for TI's J721E SoC
*) Add a driver for J721E PCIe wrapper
v1 of the series can be found @ [1]
Changes from v1:
1) Added DT schemas cdns-pcie-host.yaml, cdns-pcie-ep.yaml and
cdns-pcie.yaml for Cadence PCIe core and included it in
TI's PCIe DT schema.
2) Added cpu_addr_fixup() for Cadence Platform driver.
3) Fixed subject/description/renamed functions as commented by
Andrew Murray.
[1] -> http://lore.kernel.org/r/20191209092147.22901-1-kishon@ti.com
Kishon Vijay Abraham I (14):
dt-bindings: PCI: cadence: Add PCIe RC/EP DT schema for Cadence PCIe
PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path
linux/kernel.h: Add PTR_ALIGN_DOWN macro
PCI: cadence: Add support to use custom read and write accessors
PCI: cadence: Add support to start link and verify link status
PCI: cadence: Add read/write accessors to perform only 32-bit accesses
PCI: cadence: Allow pci_host_bridge to have custom pci_ops
PCI: cadence: Add new *ops* for CPU addr fixup
PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register
dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC
dt-bindings: PCI: Add EP mode dt-bindings for TI's J721E SoC
PCI: j721e: Add TI J721E PCIe driver
misc: pci_endpoint_test: Add J721E in pci_device_id table
MAINTAINERS: Add Kishon Vijay Abraham I for TI J721E SoC PCIe
.../devicetree/bindings/pci/cdns-pcie-ep.yaml | 20 +
.../bindings/pci/cdns-pcie-host.yaml | 30 ++
.../devicetree/bindings/pci/cdns-pcie.yaml | 32 ++
.../bindings/pci/ti,j721e-pci-ep.yaml | 93 ++++
.../bindings/pci/ti,j721e-pci-host.yaml | 119 +++++
MAINTAINERS | 4 +-
drivers/misc/pci_endpoint_test.c | 9 +
drivers/pci/controller/cadence/Kconfig | 23 +
drivers/pci/controller/cadence/Makefile | 1 +
drivers/pci/controller/cadence/pci-j721e.c | 438 ++++++++++++++++++
.../pci/controller/cadence/pcie-cadence-ep.c | 17 +-
.../controller/cadence/pcie-cadence-host.c | 59 ++-
.../controller/cadence/pcie-cadence-plat.c | 13 +
drivers/pci/controller/cadence/pcie-cadence.c | 48 +-
drivers/pci/controller/cadence/pcie-cadence.h | 148 +++++-
include/linux/kernel.h | 1 +
16 files changed, 1014 insertions(+), 41 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml
create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie.yaml
create mode 100644 Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
create mode 100644 Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
create mode 100644 drivers/pci/controller/cadence/pci-j721e.c
--
2.17.1
next reply other threads:[~2020-01-06 10:19 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-06 10:20 Kishon Vijay Abraham I [this message]
2020-01-06 10:20 ` [PATCH v2 01/14] dt-bindings: PCI: cadence: Add PCIe RC/EP DT schema for Cadence PCIe Kishon Vijay Abraham I
2020-01-08 3:43 ` Rob Herring
2020-01-08 5:35 ` Kishon Vijay Abraham I
2020-01-16 11:31 ` Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 02/14] PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 03/14] linux/kernel.h: Add PTR_ALIGN_DOWN macro Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 04/14] PCI: cadence: Add support to use custom read and write accessors Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 05/14] PCI: cadence: Add support to start link and verify link status Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 06/14] PCI: cadence: Add read/write accessors to perform only 32-bit accesses Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 07/14] PCI: cadence: Allow pci_host_bridge to have custom pci_ops Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 08/14] PCI: cadence: Add new *ops* for CPU addr fixup Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 09/14] PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 10/14] dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 11/14] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 12/14] PCI: j721e: Add TI J721E PCIe driver Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 13/14] misc: pci_endpoint_test: Add J721E in pci_device_id table Kishon Vijay Abraham I
2020-01-06 10:20 ` [PATCH v2 14/14] MAINTAINERS: Add Kishon Vijay Abraham I for TI J721E SoC PCIe Kishon Vijay Abraham I
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