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* [PATCH] arm64: dts: hi3798cv200: correct PCIe 'bus-range' setting
@ 2020-01-07 12:29 Shawn Guo
  2020-01-08 11:37 ` Wei Xu
  0 siblings, 1 reply; 2+ messages in thread
From: Shawn Guo @ 2020-01-07 12:29 UTC (permalink / raw)
  To: Wei Xu; +Cc: devicetree, linux-arm-kernel, Shawn Guo

The PCIe 'bus-range' setting is incorrect and causing the following
message during boot.

pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-0f] (conflicts with (null) [bus 00-0f])

Correct it to get rid of the message.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 0a30aaae6bf2..4d1a3d1fc31c 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -569,7 +569,7 @@
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
-			bus-range = <0 15>;
+			bus-range = <0x00 0xff>;
 			num-lanes = <1>;
 			ranges = <0x81000000 0x0 0x00000000 0x4f00000 0x0 0x100000
 				  0x82000000 0x0 0x3000000 0x3000000 0x0 0x01f00000>;
-- 
2.17.1


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2020-01-07 12:29 [PATCH] arm64: dts: hi3798cv200: correct PCIe 'bus-range' setting Shawn Guo
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