From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E15D0C33CB7 for ; Thu, 16 Jan 2020 18:13:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B5C1D208C3 for ; Thu, 16 Jan 2020 18:13:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579198389; bh=KaJf4hSD/y/mradPUnWk1oZqxpE7DMsG6WMlEJ0ObRg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ENGE88RqXcgaG92yl/YTnPi4QHPjxwUZSW+W/tq7xaCzq5vPmCTaDVI+BuykZBXvE hutX0trfhPinboQ1ogzgGU2fmW/GefCvpnOx8oq3a5QDXUOh3Vg6/A7utGUIoLQwrh Vbb9fRQpDWmeamoZVguKNvbxdREGrqiPaBQdVczg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405251AbgAPRg7 (ORCPT ); Thu, 16 Jan 2020 12:36:59 -0500 Received: from mail.kernel.org ([198.145.29.99]:52004 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731622AbgAPRg6 (ORCPT ); Thu, 16 Jan 2020 12:36:58 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C0BB4246AD; Thu, 16 Jan 2020 17:36:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579196218; bh=KaJf4hSD/y/mradPUnWk1oZqxpE7DMsG6WMlEJ0ObRg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KqxYV1wEtHhPOSJx+tXewUq3db3NszoExjb674yYuHW8RQyWvw9dQEiU9uEcT04Id afL1q0dTRE6azBAuQOXOdKcFVgOV5N54SoRW7Xp013J/Ne0I7HXBeDRTo142cEqQ5u PzjLgUM6hqHgNoSP+2TO04nHUwxjBQ084X+E6Lls= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Vladimir Zapolskiy , Sasha Levin , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 4.9 053/251] ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property Date: Thu, 16 Jan 2020 12:33:22 -0500 Message-Id: <20200116173641.22137-13-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200116173641.22137-1-sashal@kernel.org> References: <20200116173641.22137-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Vladimir Zapolskiy [ Upstream commit 30fc01bae3cda747e7d9c352b1aa51ca113c8a9d ] The originally added ARM PrimeCell PL111 clocks property misses the required "clcdclk" clock, which is the same as a clock to enable the LCD controller on NXP LPC3230 and NXP LPC3250 SoCs. Fixes: 93898eb775e5 ("arm: dts: lpc32xx: add clock properties to device nodes") Signed-off-by: Vladimir Zapolskiy Signed-off-by: Sasha Levin --- arch/arm/boot/dts/lpc32xx.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index 3adbbaff7971..2802c9565b6c 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -142,8 +142,8 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x31040000 0x1000>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk LPC32XX_CLK_LCD>; - clock-names = "apb_pclk"; + clocks = <&clk LPC32XX_CLK_LCD>, <&clk LPC32XX_CLK_LCD>; + clock-names = "clcdclk", "apb_pclk"; status = "disabled"; }; -- 2.20.1