From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34018C2D0DB for ; Fri, 24 Jan 2020 14:20:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F240821569 for ; Fri, 24 Jan 2020 14:20:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579875619; bh=qrQvkU+aV1DaKdMny9iBbnqh9o3QeD2Mk64oFml+xUo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=tRSplw3wn9x64FoEwaMnWu0zxP7oD4Vp78mi2vo9NnooQvHPrP3idthybNIhTBD2l 3c6XVC4xg0nY7LeTMeQDITHHC7FsdrBKaQVUUoVSJG4Xuae8F+IVQZf5vICNszE5ud lHdXCGkKpU5iU7ZcT4hp7YwNQ+6TiInC60tRFh54= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404700AbgAXOUS (ORCPT ); Fri, 24 Jan 2020 09:20:18 -0500 Received: from mail.kernel.org ([198.145.29.99]:41202 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404184AbgAXOUR (ORCPT ); Fri, 24 Jan 2020 09:20:17 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D8C1821734; Fri, 24 Jan 2020 14:20:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579875616; bh=qrQvkU+aV1DaKdMny9iBbnqh9o3QeD2Mk64oFml+xUo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aKUW1Cv+jxlMgr9ObMMHkjAKMQmnySWZBwy83oq212DMoV0wqiOF0f9eywCxmOqLz j3i7jeGfZ1X9fWnVaujOWaIq95X0NQRI9kyHZR20QFDMwBXg61YlC8fW0o1XiRCfUh AWd94AVu9AuVegrfK7OV6qB7LTqp3SVHSxbh0KyQ= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Martin Blumenstingl , Kevin Hilman , Sasha Levin , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 4.19 03/56] dt-bindings: reset: meson8b: fix duplicate reset IDs Date: Fri, 24 Jan 2020 09:19:19 -0500 Message-Id: <20200124142012.29752-3-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200124142012.29752-1-sashal@kernel.org> References: <20200124142012.29752-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Martin Blumenstingl [ Upstream commit 4881873f4cc1460f63d85fa81363d56be328ccdc ] According to the public S805 datasheet the RESET2 register uses the following bits for the PIC_DC, PSC and NAND reset lines: - PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3) - PSC is at bit 4 (meaning: RESET_VD_RMEM + 4) - NAND is at bit 5 (meaning: RESET_VD_RMEM + 4) Update the reset IDs of these three reset lines so they don't conflict with PIC_DC and map to the actual hardware reset lines. Fixes: 79795e20a184eb ("dt-bindings: reset: Add bindings for the Meson SoC Reset Controller") Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman Signed-off-by: Sasha Levin --- include/dt-bindings/reset/amlogic,meson8b-reset.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/dt-bindings/reset/amlogic,meson8b-reset.h b/include/dt-bindings/reset/amlogic,meson8b-reset.h index 614aff2c7affe..a03e86fe2c570 100644 --- a/include/dt-bindings/reset/amlogic,meson8b-reset.h +++ b/include/dt-bindings/reset/amlogic,meson8b-reset.h @@ -95,9 +95,9 @@ #define RESET_VD_RMEM 64 #define RESET_AUDIN 65 #define RESET_DBLK 66 -#define RESET_PIC_DC 66 -#define RESET_PSC 66 -#define RESET_NAND 66 +#define RESET_PIC_DC 67 +#define RESET_PSC 68 +#define RESET_NAND 69 #define RESET_GE2D 70 #define RESET_PARSER_REG 71 #define RESET_PARSER_FETCH 72 -- 2.20.1