From: Michael Walle <michael@walle.cc>
To: linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Shawn Guo <shawnguo@kernel.org>, Li Yang <leoyang.li@nxp.com>,
Jiri Slaby <jslaby@suse.com>, Peng Fan <peng.fan@nxp.com>,
Yuan Yao <yao.yuan@nxp.com>,
Vabhav Sharma <vabhav.sharma@nxp.com>,
Michael Walle <michael@walle.cc>
Subject: [PATCH 7/7] arm64: dts: ls1028a: add missing LPUART nodes
Date: Thu, 20 Feb 2020 18:43:34 +0100 [thread overview]
Message-ID: <20200220174334.23322-7-michael@walle.cc> (raw)
In-Reply-To: <20200220174334.23322-1-michael@walle.cc>
The LS1028A has six LPUART controllers. Add the nodes.
This was tested on a custom board.
Signed-off-by: Michael Walle <michael@walle.cc>
---
.../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 40d82c49b174..f30ffc46063d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -390,6 +390,61 @@
status = "disabled";
};
+
+ lpuart0: serial@2260000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2260000 0x0 0x1000>;
+ interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 1>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart1: serial@2270000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2270000 0x0 0x1000>;
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 1>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart2: serial@2280000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2280000 0x0 0x1000>;
+ interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 1>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart3: serial@2290000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2290000 0x0 0x1000>;
+ interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 1>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart4: serial@22a0000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x22a0000 0x0 0x1000>;
+ interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 1>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
+ lpuart5: serial@22b0000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x22b0000 0x0 0x1000>;
+ interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen 4 1>;
+ clock-names = "ipg";
+ status = "disabled";
+ };
+
edma0: dma-controller@22c0000 {
#dma-cells = <2>;
compatible = "fsl,ls1028a-edma";
--
2.20.1
next prev parent reply other threads:[~2020-02-20 17:44 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-20 17:43 [PATCH 1/7] Revert "tty: serial: fsl_lpuart: drop EARLYCON_DECLARE" Michael Walle
2020-02-20 17:43 ` [PATCH 2/7] tty: serial: fsl_lpuart: free IDs allocated by IDA Michael Walle
2020-02-20 17:43 ` [PATCH 3/7] tty: serial: fsl_lpuart: handle EPROBE_DEFER for DMA Michael Walle
2020-02-20 17:43 ` [PATCH 4/7] dt-bindings: serial: lpuart: add ls1028a compatibility Michael Walle
2020-02-20 17:43 ` [PATCH 5/7] tty: serial: fsl_lpuart: add LS1028A support Michael Walle
2020-02-20 17:43 ` [PATCH 6/7] tty: serial: fsl_lpuart: add LS1028A earlycon support Michael Walle
2020-02-20 17:43 ` Michael Walle [this message]
2020-02-21 1:30 ` [PATCH 1/7] Revert "tty: serial: fsl_lpuart: drop EARLYCON_DECLARE" Peng Fan
2020-02-21 9:34 ` Michael Walle
2020-02-24 1:12 ` Peng Fan
2020-02-24 7:52 ` Michael Walle
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