From: Tony Lindgren <tony@atomide.com>
To: linux-omap@vger.kernel.org
Cc: "Benoît Cousson" <bcousson@baylibre.com>,
devicetree@vger.kernel.org, "Jyri Sarha" <jsarha@ti.com>,
"Laurent Pinchart" <laurent.pinchart@ideasonboard.com>,
"Sebastian Reichel" <sre@kernel.org>,
"Tomi Valkeinen" <tomi.valkeinen@ti.com>,
Keerthy <j-keerthy@ti.com>
Subject: [PATCH 01/23] ARM: dts: Configure interconnect target module for omap4 dss
Date: Mon, 24 Feb 2020 13:09:37 -0800 [thread overview]
Message-ID: <20200224210959.56146-2-tony@atomide.com> (raw)
In-Reply-To: <20200224210959.56146-1-tony@atomide.com>
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty until the child
devices are probing with ti-sysc interconnect driver.
The display subsystem (DSS) is in a 16MB interconnect target module
mapped to l4 and l3 buses. We are only using the l3 port as recommended
by the TRM. So there is no need to configure l4 ranges like we've done
for l4 ABE instance for example.
Initially let's just update the top level dss node to probe with ti-sysc
interconnect target module driver. The child nodes are still children
of dispc, only the node indentation changes for them now along with
using the reg range provided by top level dss.
Let's also add add a note about using only the l3 access without l4
as noted in the TRM.
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/omap4-l4.dtsi | 1 +
arch/arm/boot/dts/omap4.dtsi | 170 ++++++++++++++++++--------------
2 files changed, 96 insertions(+), 75 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-l4.dtsi b/arch/arm/boot/dts/omap4-l4.dtsi
--- a/arch/arm/boot/dts/omap4-l4.dtsi
+++ b/arch/arm/boot/dts/omap4-l4.dtsi
@@ -1529,6 +1529,7 @@ timer9: timer@0 {
};
};
+ /* Unused DSS L4 access, see L3 instead */
target-module@40000 { /* 0x48040000, ap 13 0a.0 */
compatible = "ti,sysc";
status = "disabled";
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -415,87 +415,107 @@ target-module@56000000 {
*/
};
- dss: dss@58000000 {
- compatible = "ti,omap4-dss";
- reg = <0x58000000 0x80>;
- status = "disabled";
+ /*
+ * DSS is only using l3 mapping without l4 as noted in the TRM
+ * "10.1.3 DSS Register Manual" for omap4460.
+ */
+ target-module@58000000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "dss_core";
- clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
- clock-names = "fck";
+ reg = <0x58000000 4>,
+ <0x58000014 4>;
+ reg-names = "rev", "syss";
+ ti,syss-mask = <1>;
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 0>,
+ <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
+ <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>,
+ <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
+ clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
#address-cells = <1>;
#size-cells = <1>;
- ranges;
-
- dispc@58001000 {
- compatible = "ti,omap4-dispc";
- reg = <0x58001000 0x1000>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "dss_dispc";
- clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
- clock-names = "fck";
- };
-
- rfbi: encoder@58002000 {
- compatible = "ti,omap4-rfbi";
- reg = <0x58002000 0x1000>;
- status = "disabled";
- ti,hwmods = "dss_rfbi";
- clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>, <&l3_div_ck>;
- clock-names = "fck", "ick";
- };
+ ranges = <0 0x58000000 0x1000000>;
- venc: encoder@58003000 {
- compatible = "ti,omap4-venc";
- reg = <0x58003000 0x1000>;
+ dss: dss@0 {
+ compatible = "ti,omap4-dss";
+ reg = <0 0x80>;
status = "disabled";
- ti,hwmods = "dss_venc";
- clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
clock-names = "fck";
- };
-
- dsi1: encoder@58004000 {
- compatible = "ti,omap4-dsi";
- reg = <0x58004000 0x200>,
- <0x58004200 0x40>,
- <0x58004300 0x20>;
- reg-names = "proto", "phy", "pll";
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- ti,hwmods = "dss_dsi1";
- clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
- <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
- clock-names = "fck", "sys_clk";
- };
-
- dsi2: encoder@58005000 {
- compatible = "ti,omap4-dsi";
- reg = <0x58005000 0x200>,
- <0x58005200 0x40>,
- <0x58005300 0x20>;
- reg-names = "proto", "phy", "pll";
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- ti,hwmods = "dss_dsi2";
- clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
- <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
- clock-names = "fck", "sys_clk";
- };
-
- hdmi: encoder@58006000 {
- compatible = "ti,omap4-hdmi";
- reg = <0x58006000 0x200>,
- <0x58006200 0x100>,
- <0x58006300 0x100>,
- <0x58006400 0x1000>;
- reg-names = "wp", "pll", "phy", "core";
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- ti,hwmods = "dss_hdmi";
- clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
- <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
- clock-names = "fck", "sys_clk";
- dmas = <&sdma 76>;
- dma-names = "audio_tx";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x1000000>;
+
+ dispc@1000 {
+ compatible = "ti,omap4-dispc";
+ reg = <0x1000 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "dss_dispc";
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
+ clock-names = "fck";
+ };
+
+ rfbi: encoder@2000 {
+ compatible = "ti,omap4-rfbi";
+ reg = <0x2000 0x1000>;
+ status = "disabled";
+ ti,hwmods = "dss_rfbi";
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>, <&l3_div_ck>;
+ clock-names = "fck", "ick";
+ };
+
+ venc: encoder@3000 {
+ compatible = "ti,omap4-venc";
+ reg = <0x3000 0x1000>;
+ status = "disabled";
+ ti,hwmods = "dss_venc";
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
+ clock-names = "fck";
+ };
+
+ dsi1: encoder@4000 {
+ compatible = "ti,omap4-dsi";
+ reg = <0x4000 0x200>,
+ <0x4200 0x40>,
+ <0x4300 0x20>;
+ reg-names = "proto", "phy", "pll";
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ ti,hwmods = "dss_dsi1";
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
+ <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
+ clock-names = "fck", "sys_clk";
+ };
+
+ dsi2: encoder@5000 {
+ compatible = "ti,omap4-dsi";
+ reg = <0x5000 0x200>,
+ <0x5200 0x40>,
+ <0x5300 0x20>;
+ reg-names = "proto", "phy", "pll";
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ ti,hwmods = "dss_dsi2";
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
+ <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
+ clock-names = "fck", "sys_clk";
+ };
+
+ hdmi: encoder@6000 {
+ compatible = "ti,omap4-hdmi";
+ reg = <0x6000 0x200>,
+ <0x6200 0x100>,
+ <0x6300 0x100>,
+ <0x6400 0x1000>;
+ reg-names = "wp", "pll", "phy", "core";
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ ti,hwmods = "dss_hdmi";
+ clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
+ <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
+ clock-names = "fck", "sys_clk";
+ dmas = <&sdma 76>;
+ dma-names = "audio_tx";
+ };
};
};
};
--
2.25.1
next prev parent reply other threads:[~2020-02-24 21:10 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-24 21:09 [PATCH 00/23] Drop platform data for omap DSS Tony Lindgren
2020-02-24 21:09 ` Tony Lindgren [this message]
2020-02-24 21:09 ` [PATCH 02/23] ARM: dts: Configure interconnect target module for omap4 dispc Tony Lindgren
2020-02-24 21:09 ` [PATCH 03/23] ARM: dts: Configure interconnect target module for omap4 rfbi Tony Lindgren
2020-02-24 21:09 ` [PATCH 04/23] ARM: dts: Configure interconnect target module for omap4 venc Tony Lindgren
2020-02-24 21:09 ` [PATCH 05/23] ARM: dts: Configure interconnect target module for omap4 dsi1 Tony Lindgren
2020-02-24 21:09 ` [PATCH 06/23] ARM: dts: Configure interconnect target module for omap4 dsi2 Tony Lindgren
2020-02-24 21:09 ` [PATCH 07/23] ARM: dts: Configure interconnect target module for omap4 hdmi Tony Lindgren
2020-02-24 21:09 ` [PATCH 08/23] ARM: OMAP2+: Drop legacy platform data for omap4 dss Tony Lindgren
2020-02-24 21:09 ` [PATCH 09/23] ARM: dts: Configure interconnect target module for omap5 dss Tony Lindgren
2020-02-24 21:09 ` [PATCH 10/23] ARM: dts: Configure interconnect target module for omap5 dispc Tony Lindgren
2020-02-24 21:09 ` [PATCH 11/23] ARM: dts: Configure interconnect target module for omap5 rfbi Tony Lindgren
2020-02-24 21:09 ` [PATCH 12/23] ARM: dts: Configure interconnect target module for omap5 dsi1 Tony Lindgren
2020-02-24 21:09 ` [PATCH 13/23] ARM: dts: Configure interconnect target module for omap5 dsi2 Tony Lindgren
2020-02-24 21:09 ` [PATCH 14/23] ARM: dts: Configure interconnect target module for omap5 hdmi Tony Lindgren
2020-02-24 21:09 ` [PATCH 15/23] ARM: OMAP2+: Drop legacy platform data for omap5 DSS Tony Lindgren
2020-02-24 21:09 ` [PATCH 16/23] ARM: dts: Configure interconnect target module for dra7 dss Tony Lindgren
2020-02-24 21:09 ` [PATCH 17/23] ARM: dts: Configure interconnect target module for dra7 dispc Tony Lindgren
2020-02-24 21:09 ` [PATCH 18/23] ARM: dts: Configure interconnect target module for dra7 hdmi Tony Lindgren
2020-02-24 21:09 ` [PATCH 19/23] ARM: OMAP2+: Drop legacy platform data for dra7 DSS Tony Lindgren
2020-02-24 21:09 ` [PATCH 20/23] ARM: dts: Move am437x dss to the interconnect target module in l4 Tony Lindgren
2020-02-24 21:09 ` [PATCH 21/23] ARM: dts: Configure interconnect target module for am437x dispc Tony Lindgren
2020-02-24 21:09 ` [PATCH 22/23] ARM: dts: Configure interconnect target module for am437x rfbi Tony Lindgren
2020-02-24 21:09 ` [PATCH 23/23] ARM: OMAP2+: Drop legacy platform data for am437x DSS Tony Lindgren
2020-02-24 21:21 ` [PATCH 00/23] Drop platform data for omap DSS Laurent Pinchart
2020-02-24 21:30 ` Tony Lindgren
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