From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E35D8C4BA24 for ; Wed, 26 Feb 2020 20:28:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B8CD424656 for ; Wed, 26 Feb 2020 20:28:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582748929; bh=X+heKnO6iZTZfGKI6KSWMm0otaVfMYMz/2QFDt5Deug=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=StAaATB2AElZygIM4Ln4MvocMn5oKnavhypMSIEp2W9RFOfcuJa7g/tf/m1g38HFd mRyxwKQ/Jm+2FzMD6rs6Q1MrqpwtfLQN9z1GNa4Q7hmiGitSIrpTKrdQ5BY5siFrSM TRkLKNOMAwDZllHBx8DrnntFPAPPsu3NXSzl/e9s= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727379AbgBZU2t (ORCPT ); Wed, 26 Feb 2020 15:28:49 -0500 Received: from mail-ot1-f66.google.com ([209.85.210.66]:40817 "EHLO mail-ot1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727289AbgBZU2t (ORCPT ); Wed, 26 Feb 2020 15:28:49 -0500 Received: by mail-ot1-f66.google.com with SMTP id i6so716301otr.7; Wed, 26 Feb 2020 12:28:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=O/ZmfWy9/9XjBdv30P0G0kcHPh66hW3ql84KTaPPF/A=; b=tejn9+7PuRfQB+7/Y8fniQ4VqaUBICLZRN/doe5HIMv9P8kDr3uiephZvF0PAYP97a SmEhM5DiBrvJbV9S/rGBzWecQV/B+3uwfGR7mfYC2+fASqkpw/oCGE/8UJuZ07vYArxt OV7oBOt6lZL3H8ZN86bcBLGYTFdpIeldA7G+kX7sSYhsLOUeu98seB6K6UcCPGVmBQSu aq31XkoKdp2wUfzZkwnQ6c1SKOWpeGLXqD2Nqz7+j7x9edlLST4ie+ZHwjxcxWeFER2S RDOwBpG1pwKAHUiNf6KIhnFc5IMrFHIgHafnd7pPizmsQSL0ueFprj0zPQIqqHuSBVnv LghQ== X-Gm-Message-State: APjAAAVAAYvj5Lr0+rTxmaUNTkX4XOCqYvl1nYDXqv7W131dWz05kWhy dKNbArzhDIb62c1TBxOFSw== X-Google-Smtp-Source: APXvYqx+ekwwPkyIdV8FoaGq7rSPdBmF6vtqNYcfh4IlzHYSrpmvQXBFhWXQgJrWcFqq1sadnCd3OA== X-Received: by 2002:a9d:74c4:: with SMTP id a4mr456108otl.119.1582748926618; Wed, 26 Feb 2020 12:28:46 -0800 (PST) Received: from rob-hp-laptop (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id e10sm507605otl.0.2020.02.26.12.28.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2020 12:28:45 -0800 (PST) Received: (nullmailer pid 4643 invoked by uid 1000); Wed, 26 Feb 2020 20:28:44 -0000 Date: Wed, 26 Feb 2020 14:28:44 -0600 From: Rob Herring To: Macpaul Lin Cc: Mark Rutland , Matthias Brugger , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , mtk01761 , Fabien Parent , Weiyi Lu , Mars Cheng , Sean Wang , Owen Chen , Chunfeng Yun , Evan Green , Yong Wu , Joerg Roedel , Shawn Guo , Marc Zyngier , Ryder Lee , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, Mediatek WSD Upstream , CC Hwang , Loda Chou Subject: Re: [PATCH 2/5] dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC Message-ID: <20200226202844.GA18610@bogus> References: <1582278742-1626-1-git-send-email-macpaul.lin@mediatek.com> <1582278742-1626-3-git-send-email-macpaul.lin@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1582278742-1626-3-git-send-email-macpaul.lin@mediatek.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, Feb 21, 2020 at 05:52:19PM +0800, Macpaul Lin wrote: > This patch adds the binding documentation for mipi0a. > > Signed-off-by: Mars Cheng > Signed-off-by: Owen Chen > Signed-off-by: Macpaul Lin > --- > .../bindings/arm/mediatek/mediatek,mipi0a.txt | 28 +++++++++++++++++++ > 1 file changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt Please use DT schema for new bindings. See Documentation/devicetree/writing-schema.rst. > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt > new file mode 100644 > index 000000000000..8be5978f388d > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt > @@ -0,0 +1,28 @@ > +Mediatek mipi0a (mipi_rx_ana_csi0a) controller > +============================ > + > +The Mediatek mipi0a controller provides various clocks > +to the system. > + > +Required Properties: > + > +- compatible: Should be one of: > + - "mediatek,mt6765-mipi0a", "syscon" > +- #clock-cells: Must be 1 > + > +The mipi0a controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +The mipi0a controller also uses the common power domain from > +Documentation/devicetree/bindings/soc/mediatek/scpsys.txt > +The available power doamins are defined in dt-bindings/power/mt*-power.h. > + > +Example: > + > +mipi0a: clock-controller@11c10000 { > + compatible = "mediatek,mt6765-mipi0a", "syscon"; > + reg = <0 0x11c10000 0 0x1000>; Not documented. > + power-domains = <&scpsys MT6765_POWER_DOMAIN_CAM>; Not documented. > + #clock-cells = <1>; > +}; > -- > 2.18.0