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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id t20sm2365430oij.19.2020.02.27.13.42.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2020 13:42:19 -0800 (PST) Received: (nullmailer pid 2192 invoked by uid 1000); Thu, 27 Feb 2020 21:42:18 -0000 Date: Thu, 27 Feb 2020 15:42:18 -0600 From: Rob Herring To: Andre Przywara List-Id: Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Maxime Ripard , Robert Richter , soc@kernel.org, Jon Loeliger , Mark Langsdorf , Eric Auger , Will Deacon , Catalin Marinas Subject: Re: [PATCH v2 01/13] arm: dts: calxeda: Basic DT file fixes Message-ID: <20200227214218.GA26010@bogus> References: <20200227182210.89512-1-andre.przywara@arm.com> <20200227182210.89512-2-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200227182210.89512-2-andre.przywara@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Feb 27, 2020 at 06:21:58PM +0000, Andre Przywara wrote: > The .dts files for the Calxeda machines are quite old, so carry some > sloppy mistakes that the DT schema checker will complain about. > > Fix those issues, they should not have any effect on functionality. > > Signed-off-by: Andre Przywara > --- > arch/arm/boot/dts/ecx-2000.dts | 3 --- > arch/arm/boot/dts/highbank.dts | 7 ++----- > 2 files changed, 2 insertions(+), 8 deletions(-) > > diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts > index 5651ae6dc969..81eb382b4c23 100644 > --- a/arch/arm/boot/dts/ecx-2000.dts > +++ b/arch/arm/boot/dts/ecx-2000.dts > @@ -13,7 +13,6 @@ > compatible = "calxeda,ecx-2000"; > #address-cells = <2>; > #size-cells = <2>; > - clock-ranges; > > cpus { > #address-cells = <1>; > @@ -83,8 +82,6 @@ > intc: interrupt-controller@fff11000 { > compatible = "arm,cortex-a15-gic"; > #interrupt-cells = <3>; > - #size-cells = <0>; > - #address-cells = <1>; This is needed if there's an interrupt-map pointing to the gic node. However, it should be 0 in that case. I thought we had to fix this at some point, but I can't find any record of it. So I guess fine to remove. Reviewed-by: Rob Herring > interrupt-controller; > interrupts = <1 9 0xf04>; > reg = <0xfff11000 0x1000>, > diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts > index f4e4dca6f7e7..9e34d1bd7994 100644 > --- a/arch/arm/boot/dts/highbank.dts > +++ b/arch/arm/boot/dts/highbank.dts > @@ -13,7 +13,6 @@ > compatible = "calxeda,highbank"; > #address-cells = <1>; > #size-cells = <1>; > - clock-ranges; > > cpus { > #address-cells = <1>; > @@ -96,7 +95,7 @@ > }; > }; > > - memory { > + memory@0 { > name = "memory"; > device_type = "memory"; > reg = <0x00000000 0xff900000>; > @@ -128,14 +127,12 @@ > intc: interrupt-controller@fff11000 { > compatible = "arm,cortex-a9-gic"; > #interrupt-cells = <3>; > - #size-cells = <0>; > - #address-cells = <1>; > interrupt-controller; > reg = <0xfff11000 0x1000>, > <0xfff10100 0x100>; > }; > > - L2: l2-cache { > + L2: cache-controller { > compatible = "arm,pl310-cache"; > reg = <0xfff12000 0x1000>; > interrupts = <0 70 4>; > -- > 2.17.1 >