From: Rob Herring <robh@kernel.org>
To: Dinh Nguyen <dinguyen@kernel.org>
Cc: linux-clk@vger.kernel.org, dinguyen@kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
sboyd@kernel.org, mturquette@baylibre.com, robh+dt@kernel.org,
mark.rutland@arm.com
Subject: Re: [PATCHv3 4/5] dt-bindings: documentation: add clock bindings information for Agilex
Date: Wed, 18 Mar 2020 16:40:42 -0600 [thread overview]
Message-ID: <20200318224042.GA32101@bogus> (raw)
In-Reply-To: <20200317161022.11181-5-dinguyen@kernel.org>
On Tue, 17 Mar 2020 11:10:21 -0500, Dinh Nguyen wrote:
> Document the Agilex clock bindings, and add the clock header file. The
> clock header is an enumeration of all the different clocks on the Agilex
> platform.
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> v3: address comments from Stephen Boyd
> fix build error(tab removed in line 37)
> renamed to intel,agilex.yaml
> v2: convert original document to YAML
> ---
> .../bindings/clock/intel,agilex.yaml | 36 ++++++++++
> include/dt-bindings/clock/agilex-clock.h | 70 +++++++++++++++++++
> 2 files changed, 106 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/intel,agilex.yaml
> create mode 100644 include/dt-bindings/clock/agilex-clock.h
>
My bot found errors running 'make dt_binding_check' on your patch:
Error: Documentation/devicetree/bindings/clock/intel,agilex.example.dts:17.3-4 syntax error
FATAL ERROR: Unable to parse input tree
scripts/Makefile.lib:311: recipe for target 'Documentation/devicetree/bindings/clock/intel,agilex.example.dt.yaml' failed
make[1]: *** [Documentation/devicetree/bindings/clock/intel,agilex.example.dt.yaml] Error 1
Makefile:1262: recipe for target 'dt_binding_check' failed
make: *** [dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1256630
Please check and re-submit.
next prev parent reply other threads:[~2020-03-18 22:40 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-17 16:10 [PATCHv3 0/5] clk: agilex: add clock driver Dinh Nguyen
2020-03-17 16:10 ` [PATCHv2 1/5] clk: socfpga: stratix10: use new parent data scheme Dinh Nguyen
2020-03-17 16:10 ` [PATCH 2/5] clk: socfpga: remove clk_ops enable/disable methods Dinh Nguyen
2020-03-17 16:10 ` [PATCH 3/5] clk: socfpga: add const to _ops data structures Dinh Nguyen
2020-03-17 16:10 ` [PATCHv3 4/5] dt-bindings: documentation: add clock bindings information for Agilex Dinh Nguyen
2020-03-18 22:40 ` Rob Herring [this message]
2020-03-19 16:16 ` Dinh Nguyen
2020-03-19 16:56 ` Rob Herring
2020-03-19 19:18 ` Dinh Nguyen
2020-03-17 16:10 ` [PATCHv3 5/5] clk: socfpga: agilex: add clock driver for the Agilex platform Dinh Nguyen
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