From: Rob Herring <robh@kernel.org>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
linux-mmc@vger.kernel.org, ulf.hansson@linaro.org,
jianxin.pan@amlogic.com, mark.rutland@arm.com,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, lnykww@gmail.com,
yinxin_1989@aliyun.com
Subject: Re: [PATCH v5 1/3] dt-bindings: mmc: Document the Amlogic Meson SDHC MMC host controller
Date: Mon, 30 Mar 2020 10:28:04 -0600 [thread overview]
Message-ID: <20200330162804.GA27288@bogus> (raw)
In-Reply-To: <20200328003249.1248978-2-martin.blumenstingl@googlemail.com>
On Sat, Mar 28, 2020 at 01:32:47AM +0100, Martin Blumenstingl wrote:
> This documents the devicetree bindings for the SDHC MMC host controller
> found in Meson6, Meson8, Meson8b and Meson8m2 SoCs. It can use a
> bus-width of 1/4/8-bit and it supports eMMC spec 4.4x/4.5x including
> HS200 mode (up to 100MHz clock). It embeds an internal clock controller
> which outputs four clocks (mod_clk, sd_clk, tx_clk and rx_clk) and is
> fed by four external input clocks (clkin[0-3]). "pclk" is the module
> register clock, it has to be enabled to access the registers.
>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> .../bindings/mmc/amlogic,meson-mx-sdhc.yaml | 83 +++++++++++++++++++
> .../dt-bindings/clock/meson-mx-sdhc-clkc.h | 8 ++
> 2 files changed, 91 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml
> create mode 100644 include/dt-bindings/clock/meson-mx-sdhc-clkc.h
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2020-03-30 16:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-28 0:32 [PATCH v5 0/3] Amlogic 32-bit Meson SoC SDHC MMC controller driver Martin Blumenstingl
2020-03-28 0:32 ` [PATCH v5 1/3] dt-bindings: mmc: Document the Amlogic Meson SDHC MMC host controller Martin Blumenstingl
2020-03-30 16:28 ` Rob Herring [this message]
2020-03-28 0:32 ` [PATCH v5 2/3] clk: meson: add a driver for the Meson8/8b/8m2 SDHC clock controller Martin Blumenstingl
2020-04-27 8:41 ` Jerome Brunet
2020-04-27 16:33 ` Martin Blumenstingl
2020-04-27 16:58 ` Jerome Brunet
2020-03-28 0:32 ` [PATCH v5 3/3] mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC host Martin Blumenstingl
2020-04-22 18:17 ` Anand Moon
2020-04-27 19:19 ` Ulf Hansson
2020-04-27 19:44 ` Martin Blumenstingl
2020-04-25 20:26 ` [PATCH v5 0/3] Amlogic 32-bit Meson SoC SDHC MMC controller driver Martin Blumenstingl
2020-04-27 6:58 ` Ulf Hansson
2020-04-27 8:56 ` Jerome Brunet
2020-04-27 16:23 ` Martin Blumenstingl
2020-04-27 16:46 ` Jerome Brunet
2020-04-27 18:35 ` Ulf Hansson
2020-04-27 19:31 ` Martin Blumenstingl
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