From: Rob Herring <robh@kernel.org>
To: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Cc: kishon@ti.com, mark.rutland@arm.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: phy: intel: Add documentation for Keem Bay eMMC PHY
Date: Mon, 30 Mar 2020 14:23:21 -0600 [thread overview]
Message-ID: <20200330202321.GA9386@bogus> (raw)
In-Reply-To: <20200316103726.16339-2-wan.ahmad.zainie.wan.mohamad@intel.com>
On Mon, Mar 16, 2020 at 06:37:25PM +0800, Wan Ahmad Zainie wrote:
> Document Intel Keem Bay eMMC PHY DT bindings.
>
> Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> ---
> .../bindings/phy/intel,keembay-emmc-phy.yaml | 57 +++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> new file mode 100644
> index 000000000000..af1d62fc8323
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/intel,keembay-emmc-phy.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: GPL-2.0-only
Dual license new bindings:
(GPL-2.0-only OR BSD-2-Clause)
> +# Copyright 2020 Intel Corporation
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/phy/intel,keembay-emmc-phy.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Intel Keem Bay eMMC PHY
> +
> +maintainers:
> + - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> +
> +properties:
> + compatible:
> + enum:
> + - intel,keembay-emmc-phy
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: emmcclk
> +
> + intel,syscon:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
Make this binding a child of the syscon and get rid of this.
> + description:
> + A phandle to a syscon device used to access core/phy configuration
> + registers.
> +
> + "#phy-cells":
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> + - intel,syscon
> + - "#phy-cells"
> +
> +examples:
> + - |
> + mmc_phy_syscon: syscon@20290000 {
> + compatible = "simple-mfd", "syscon";
> + reg = <0x0 0x20290000 0x0 0x54>;
> + };
> +
> + emmc_phy: mmc_phy@20290000 {
phy@...
> + compatible = "intel,keembay-emmc-phy";
> + reg = <0x0 0x20290000 0x0 0x54>;
Here you have overlapping register regions. Don't do that.
Given they are the same size, why do you need the syscon at all?
> + clocks = <&mmc>;
> + clock-names = "emmcclk";
> + intel,syscon = <&mmc_phy_syscon>;
> + #phy-cells = <0>;
> + };
> --
> 2.17.1
>
next prev parent reply other threads:[~2020-03-30 20:23 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 10:37 [PATCH 0/2] phy: intel: Add Keem Bay eMMC PHY support Wan Ahmad Zainie
2020-03-16 10:37 ` [PATCH 1/2] dt-bindings: phy: intel: Add documentation for Keem Bay eMMC PHY Wan Ahmad Zainie
2020-03-20 5:58 ` Kishon Vijay Abraham I
2020-03-30 20:23 ` Rob Herring [this message]
2020-04-29 0:58 ` Wan Mohamad, Wan Ahmad Zainie
2020-03-16 10:37 ` [PATCH 2/2] phy: intel: Add Keem Bay eMMC PHY support Wan Ahmad Zainie
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