From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20ACDC2D0F2 for ; Tue, 31 Mar 2020 19:14:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EF21E208E0 for ; Tue, 31 Mar 2020 19:14:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728236AbgCaTOH (ORCPT ); Tue, 31 Mar 2020 15:14:07 -0400 Received: from asavdk3.altibox.net ([109.247.116.14]:51070 "EHLO asavdk3.altibox.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726295AbgCaTOH (ORCPT ); Tue, 31 Mar 2020 15:14:07 -0400 Received: from ravnborg.org (unknown [158.248.194.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by asavdk3.altibox.net (Postfix) with ESMTPS id 5283F20026; Tue, 31 Mar 2020 21:13:55 +0200 (CEST) Date: Tue, 31 Mar 2020 21:13:53 +0200 From: Sam Ravnborg To: Rob Herring Cc: dri-devel , Thierry Reding , devicetree@vger.kernel.org, Alexandre Courbot , Andrzej Hajda , Brian Masney , Chris Zhong , Douglas Anderson , Guido Gunther , Heiko Schocher , Nikolaus Schaller , Hoegeun Kwon , Jagan Teki , Jerry Han , Jonathan Bakker , Laurent Pinchart , Lin Huang , Linus Walleij , linux-spi , Marco Franchi , Marek Belisko , Mark Brown , Maxime Ripard , Maxime Ripard , Nickey Yang , Paul Cercueil , Peter Rosin , Peter Ujfalusi , Purism Kernel Team , Robert Chiras , Sandeep Panda , Stefan Mavrodiev , Tomi Valkeinen , Tony Lindgren , Vinay Simha BN , Werner Johansson Subject: Re: [PATCH v1 32/36] dt-bindings: display: convert sharp,ls037v7dw01 to DT Schema Message-ID: <20200331191353.GA14267@ravnborg.org> References: <20200315134416.16527-1-sam@ravnborg.org> <20200315134416.16527-33-sam@ravnborg.org> <20200319030734.GH29911@bogus> <20200329190352.GA21479@ravnborg.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CMAE-Score: 0 X-CMAE-Analysis: v=2.3 cv=eMA9ckh1 c=1 sm=1 tr=0 a=UWs3HLbX/2nnQ3s7vZ42gw==:117 a=UWs3HLbX/2nnQ3s7vZ42gw==:17 a=jpOVt7BSZ2e4Z31A5e1TngXxSK0=:19 a=kj9zAlcOel0A:10 a=7gkXJVJtAAAA:8 a=PfGF7aXqCGx1eBp2H3AA:9 a=CjuIK1q_8ugA:10 a=E9Po1WZjFZOl8hwRPBS3:22 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Rob. On Tue, Mar 31, 2020 at 11:20:13AM -0600, Rob Herring wrote: > On Sun, Mar 29, 2020 at 1:04 PM Sam Ravnborg wrote: > > > > Hi Rob. > > > > > > + > > > > + mode-gpios: > > > > + description: | > > > > + GPIO ordered MO, LR, and UD as specified in LS037V7DW01.pdf > > > > > > 3 or... > > > > > > > + change configuration between QVGA and VGA mode and the > > > > + scan direction. As these pins can be also configured > > > > + with external pulls, all the GPIOs are considered > > > > + optional with holes in the array. > > > > > > minItems: 3 > > > maxItems: 5 > > > > This binding can specify up to three GPIOs like this: > > So it should be: > > minItems: 1 > maxItems: 3 > > > > > + mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */ > > > > + &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */ > > > > + &gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */ > > > > They are in the linux kernel driver accessed like this: > > > > devm_gpiod_get_index(&pdev->dev, "mode", 2, GPIOD_OUT_LOW); > > > > The following is OK in the DT file: > > > > mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; > > > > mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH > > &gpio1 2 GPIO_ACTIVE_HIGH>; > > > > mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH > > &gpio1 2 GPIO_ACTIVE_HIGH > > &gpio1 3 GPIO_ACTIVE_HIGH>; > > With the above, the 2nd 2 should fail... > > > But the following is not OK: > > mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>, <&gpio1 2 GPIO_ACTIVE_HIGH>; > > And this should pass. We want phandle+arg type properties to be > bracketed like this. OK, so if I get you right you say that we should accept the: , ... syntax. And then ignore that current DT files uses: A binding like this: mode-gpios: minItems: 1 maxItems: 3 description: | GPIO ordered MO, LR, and UD as specified in LS037V7DW01.pdf This panel can have zero to three GPIOs to configure to Do not error out when the example looks like this: mode-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH /* gpio154, lcd MO */ &gpio1 2 GPIO_ACTIVE_HIGH /* gpio2, lcd LR */ &gpio1 3 GPIO_ACTIVE_HIGH>; /* gpio3, lcd UD */ So if I get you right this is a bug in the tooling. I have updated the tooling a few days ago, should be on the latest. In the actual example I go for the snip you see above. Sam