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[2003:e4:1f4a:9b00:76d0:2bff:fe27:3f51]) by smtp.gmail.com with ESMTPSA id a64sm5182188wmh.39.2020.03.31.13.04.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Mar 2020 13:04:17 -0700 (PDT) Date: Tue, 31 Mar 2020 22:04:17 +0200 From: Thierry Reding To: Dmitry Osipenko Cc: Thomas Gleixner , Rob Herring , Jon Hunter , linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/7] clocksource: Add Tegra186 timers support Message-ID: <20200331200417.GB2950334@ulmo> References: <20200320133452.3705040-1-thierry.reding@gmail.com> <20200320133452.3705040-3-thierry.reding@gmail.com> <20200320150406.GA3706404@ulmo> <5a559950-0497-b24f-6484-c2513375fe62@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="IiVenqGWf+H9Y6IX" Content-Disposition: inline In-Reply-To: <5a559950-0497-b24f-6484-c2513375fe62@gmail.com> User-Agent: Mutt/1.13.1 (2019-12-14) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --IiVenqGWf+H9Y6IX Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Mar 20, 2020 at 06:23:35PM +0300, Dmitry Osipenko wrote: > 20.03.2020 18:04, Thierry Reding =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > > On Fri, Mar 20, 2020 at 05:39:01PM +0300, Dmitry Osipenko wrote: > >> 20.03.2020 16:34, Thierry Reding =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > >>> From: Thierry Reding > >>> > >>> Currently this only supports a single watchdog, which uses a timer in > >>> the background for countdown. Eventually the timers could be used for > >>> various time-keeping tasks, but by default the architected timer will > >>> already provide that functionality. > >>> > >>> Signed-off-by: Thierry Reding > >>> --- > >>> drivers/clocksource/Kconfig | 8 + > >>> drivers/clocksource/Makefile | 1 + > >>> drivers/clocksource/timer-tegra186.c | 377 +++++++++++++++++++++++++= ++ > >>> 3 files changed, 386 insertions(+) > >>> create mode 100644 drivers/clocksource/timer-tegra186.c > >> Hello Thierry, > >> > >> Shouldn't this driver reside in drivers/watchdog/? Like it's done in a > >> case of the T30+ driver. > >=20 > > The hardware block that this binds to is primarily a time-keeping block > > that just so happens to also implement a watchdog. Moving this to > > drivers/watchdog would put us into an odd situation if we ever added > > code to also implement the time-keeping bits for this hardware. > >=20 > > I also think that the way this is done on Tegra30 was a bad choice. The > > problem is that we now have two drivers (tegra_wdt.c and tegra-timer.c) > > that both access the same region of memory. This seems to be relatively > > safe to do on those chips because there's no overlap between the timer > > and the watchdog interfaces, but on Tegra186 and later the watchdog is > > actually using one of the timers, so we'd have to be extra careful how > > to coordinate between the two. It seems much easier to do that by having > > everything in the same driver and have that register multiple devices in > > the system. >=20 > Sounds like a watchdog on Tegra20, where one of the timer is shared with > a watchdog function and there are no other free timers. Well, yes, it's > not nice. >=20 > But, will you really ever need an additional clocksource on T186? Actually there are a couple of interesting clocksources that this IP block exposes. It contains both a microsecond clock that might come in useful because it is used as a reference by some other blocks that work with microsecond counters (some hardware sequencers have this). Another one is the OSC, which is the system's main oscillator that most clocks are derived from. Perhaps the most useful source from a software point of view is the TSC. It's a timestamp counter that can also be used as a reference for HW timestamping of certain system events, which is something that we want to upstream eventually. Having the TSC exposed as a clocksource can be interesting because it allows us to correlate these hardware timestamps with code path execution. I've implemented the three clocksources above for v2, which makes this a bit more of an actual clocksource driver that additionally provides a watchdog. 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