From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA0FCC2BA15 for ; Fri, 3 Apr 2020 06:01:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B0CCD20787 for ; Fri, 3 Apr 2020 06:01:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585893702; bh=p2IuVwkph+/SUR16YqbpBqb56Vyf1fYOzyLt2WbYoB8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=gKHRALRfNDP6AD8BQAFh7Lah9oHJArycH3fBIN5aGL1ca79rx1x2sfrJaOMYVjI4g EGSkPSC5UCAC9VI5y662IgmxmO1pILlHjFxVExIxHvWXSOMJRErzROYn2nJwFaNGmB US2Hi7OJlhOrb05ieJkDPnmflLC+YbPEg6nQ7gPo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731040AbgDCGBl (ORCPT ); Fri, 3 Apr 2020 02:01:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:39720 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729349AbgDCGBl (ORCPT ); Fri, 3 Apr 2020 02:01:41 -0400 Received: from localhost (unknown [171.76.107.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 19CB6206F6; Fri, 3 Apr 2020 06:01:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1585893700; bh=p2IuVwkph+/SUR16YqbpBqb56Vyf1fYOzyLt2WbYoB8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=QKav23U/eh6h/UhxXS/ncKxL41JZk1qm0n5hpfLHzXL0ONIxq+/ZuqChX9TyH49dI eKvRgnzQOuoAVCmL62/441OrFBkq2FrvtPqwQ+N7TAlBRl4lJk5QUGCbPOQhfKc8JC Z/x/weXzdPtovzgoqretYp6zsUfL3N1DnfrgIdCc= Date: Fri, 3 Apr 2020 11:31:27 +0530 From: Vinod Koul To: Wesley Cheng Cc: agross@kernel.org, bjorn.andersson@linaro.org, kishon@ti.com, robh+dt@kernel.org, mark.rutland@arm.com, p.zabel@pengutronix.de, mgautam@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v5 2/5] phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs Message-ID: <20200403060127.GM72691@vkoul-mobl> References: <1585880634-15222-1-git-send-email-wcheng@codeaurora.org> <1585880634-15222-3-git-send-email-wcheng@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1585880634-15222-3-git-send-email-wcheng@codeaurora.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 02-04-20, 19:23, Wesley Cheng wrote: > This adds the SNPS FemtoPHY V2 driver used in QCOM SOCs. There > are potentially multiple instances of this UTMI PHY on the > SOC, all which can utilize this driver. The V2 driver will > have a different register map compared to V1. Some nitpicks below, otherwise: Reviewed-by: Vinod Koul > +/** > + * struct qcom_snps_hsphy - structure holding snps hs phy attributes > + * > + * @phy: generic phy > + * @base: iomapped memory space for qubs2 phy > + * > + * @cfg_ahb_clk: AHB2PHY interface clock > + * @ref_clk: phy reference clock > + * @iface_clk: phy interface clock > + * @phy_reset: phy reset control > + * @vregs: regulator supplies bulk data > + This is missing the marker * for kernel doc > + * @phy_initialized: if PHY has been initialized correctly > + * This empty line is redundant > + */ > +struct qcom_snps_hsphy { > + struct phy *phy; > + void __iomem *base; > + > + struct clk *cfg_ahb_clk; > + struct clk *ref_clk; > + struct reset_control *phy_reset; > + struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS]; > + > + bool phy_initialized; > +}; > + > +static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset, > + u32 mask, u32 val) coding style mandates that second line should start at preceeding line opening brace :), so can you please make it: static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset, u32 mask, u32 val) -- ~Vinod