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Sat, 04 Apr 2020 18:54:18 -0700 (PDT) Received: from rob-hp-laptop ([64.188.179.250]) by smtp.gmail.com with ESMTPSA id x10sm4570896ili.88.2020.04.04.18.54.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Apr 2020 18:54:17 -0700 (PDT) Received: (nullmailer pid 22378 invoked by uid 1000); Sun, 05 Apr 2020 01:54:16 -0000 Date: Sat, 4 Apr 2020 19:54:16 -0600 From: Rob Herring To: Alim Akhtar Cc: devicetree@vger.kernel.org, linux-scsi@vger.kernel.org, krzk@kernel.org, avri.altman@wdc.com, martin.petersen@oracle.com, kwmad.kim@samsung.com, stanley.chu@mediatek.com, cang@codeaurora.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 1/5] dt-bindings: phy: Document Samsung UFS PHY bindings Message-ID: <20200405015416.GA16616@bogus> References: <20200327170638.17670-1-alim.akhtar@samsung.com> <20200327170638.17670-2-alim.akhtar@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200327170638.17670-2-alim.akhtar@samsung.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, Mar 27, 2020 at 10:36:34PM +0530, Alim Akhtar wrote: > This patch documents Samsung UFS PHY device tree bindings > > Signed-off-by: Alim Akhtar > --- > .../bindings/phy/samsung,ufs-phy.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml > new file mode 100644 > index 000000000000..41ba481ecc76 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: (GPL-2.0) Dual license new bindings: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Samsung SoC series UFS PHY Device Tree Bindings > + > +maintainers: > + - Alim Akhtar > + > +properties: > + "#phy-cells": > + const: 0 > + > + compatible: > + enum: > + - samsung,exynos7-ufs-phy > + > + reg: > + maxItems: 1 > + description: PHY base register address > + > + reg-names: > + items: > + - const: phy-pma > + > + clocks: > + items: > + - description: PLL reference clock > + - description: Referencec clock parrent > + > + clock-names: > + items: > + - const: ref_clk_parent > + - const: ref_clk Doesn't match what 'clocks' says. Also, why do you need the parent in DT? Just use clk_get_parent(). DT should reflect actual h/w clock connections (not what the driver happens to need). Also, there's the assigned-clocks binding. > + > + samsung,pmu-syscon: > + $ref: '/schemas/types.yaml#/definitions/phandle' > + description: phandle for PMU system controller interface, used to > + control pmu registers for power isolation We have a binding for power domains. Use that for power isolation. > + > +required: > + - "#phy-cells" > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - samsung,pmu-syscon > + > +examples: > + - | > + #include > + > + ufs_phy: ufs-phy@15571800 { > + compatible = "samsung,exynos7-ufs-phy"; > + reg = <0x15571800 0x240>; > + reg-names = "phy-pma"; > + samsung,pmu-syscon = <&pmu_system_controller>; > + #phy-cells = <0>; > + clocks = <&clock_fsys1 MOUT_FSYS1_PHYCLK_SEL1>, > + <&clock_top1 CLK_SCLK_PHY_FSYS1_26M>; > + clock-names = "ref_clk_parent", > + "ref_clk"; > + }; > +... > > base-commit: fb33c6510d5595144d585aa194d377cf74d31911 > -- > 2.17.1 >