From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D76E1C2BA2B for ; Thu, 9 Apr 2020 11:36:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B653620771 for ; Thu, 9 Apr 2020 11:36:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725970AbgDILgl (ORCPT ); Thu, 9 Apr 2020 07:36:41 -0400 Received: from asavdk3.altibox.net ([109.247.116.14]:38038 "EHLO asavdk3.altibox.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726641AbgDILgl (ORCPT ); Thu, 9 Apr 2020 07:36:41 -0400 Received: from ravnborg.org (unknown [158.248.194.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by asavdk3.altibox.net (Postfix) with ESMTPS id C574C20047; Thu, 9 Apr 2020 13:36:34 +0200 (CEST) Date: Thu, 9 Apr 2020 13:36:33 +0200 From: Sam Ravnborg To: Guido =?iso-8859-1?Q?G=FCnther?= Cc: David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Andrzej Hajda , Neil Armstrong , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Lee Jones , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Robert Chiras , Arnd Bergmann Subject: Re: [PATCH v10 2/2] drm/bridge: Add NWL MIPI DSI host controller support Message-ID: <20200409113633.GA4330@ravnborg.org> References: <22f34fb7cf7ee4262cf63372aee90bc8e5ae3f35.1584730033.git.agx@sigxcpu.org> <20200408175252.GB24828@ravnborg.org> <20200409104314.GB104945@bogon.m.sigxcpu.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200409104314.GB104945@bogon.m.sigxcpu.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CMAE-Score: 0 X-CMAE-Analysis: v=2.3 cv=eMA9ckh1 c=1 sm=1 tr=0 a=UWs3HLbX/2nnQ3s7vZ42gw==:117 a=UWs3HLbX/2nnQ3s7vZ42gw==:17 a=jpOVt7BSZ2e4Z31A5e1TngXxSK0=:19 a=kj9zAlcOel0A:10 a=wF2D5j3In6wItstX1c4A:9 a=CjuIK1q_8ugA:10 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Guido. > > > + > > > +/* i.MX8 NWL quirks */ > > > +/* i.MX8MQ errata E11418 */ > > > +#define E11418_HS_MODE_QUIRK BIT(0) > > > + > > > +#define NWL_DSI_MIPI_FIFO_TIMEOUT msecs_to_jiffies(500) > > Should the defines be moved to the header file? > > I've used this rules: register layout (that is chip properties) > go to the header file while defines specific to this very driver > go into the .c file. Hope that makes sense. Makes good sense, thanks for the explanation. Sam