From: Boris Brezillon <boris.brezillon@collabora.com>
To: "Ramuthevar,
Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
anders.roxell@linaro.org, andriy.shevchenko@intel.com,
arnd@arndb.de, brendanhiggins@google.com,
cheol.yong.kim@intel.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
masonccyang@mxic.com.tw, miquel.raynal@bootlin.com,
piotrs@cadence.com, qi-ming.wu@intel.com, richard@nod.at,
robh+dt@kernel.org, tglx@linutronix.de, vigneshr@ti.com
Subject: Re: [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
Date: Thu, 16 Apr 2020 12:26:19 +0200 [thread overview]
Message-ID: <20200416122619.2c481792@collabora.com> (raw)
In-Reply-To: <18568cf6-2955-472e-7b68-eb35e654a906@linux.intel.com>
On Thu, 16 Apr 2020 17:45:49 +0800
"Ramuthevar, Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@linux.intel.com> wrote:
> >>>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
> >>>>
> >>>> This patch adds the new IP of Nand Flash Controller(NFC) support
> >>>> on Intel's Lightning Mountain(LGM) SoC.
> >>>>
> >>>> DMA is used for burst data transfer operation, also DMA HW supports
> >>>> aligned 32bit memory address and aligned data access by default.
> >>>> DMA burst of 8 supported. Data register used to support the read/write
> >>>> operation from/to device.
> >>> I am wondering how this new hardware is different from the Lantiq NAND
> >>> controller IP - for which there is already a driver in mainline (it's
> >>> in drivers/mtd/nand/raw/xway_nand.c).
> >>> The CON and WAIT registers look suspiciously similar.
> >>>
> >>> As far as I understand the "old" SoCs (VRX200 and earlier) don't have
> >>> a built-in ECC engine. This seems to have changed with ARX300 though
> >>> (again, AFAIK).
> >>>
> >>> A bit of lineage on these SoCs (initially these were developed by
> >>> Infineon. Lantiq then started as an Infineon spin-off in 2009 and
> >>> was then acquired by Intel in 2015):
> >>> - Danube
> >>> - ARX100 from 2008/2009
> >>> - VRX200 from 2009/2010
> >>> - ARX300 from 2014
> >>> - GRX350 from 2015/2016
> >>> - GRX550 from 2017
> >>> - and now finally: LGM from 2020 (est.)
> >>>
> >>> The existing xway_nand driver supports the Danube, ARX100 and VRX200
> >>> SoCs.
> >> Lantiq upstreamed a driver for an older version of this IP core 8 years
> >> ago, see here:
> >> https://elixir.bootlin.com/linux/v5.5.6/source/drivers/mtd/nand/raw/xway_nand.c
> >> It does not support DMA and ECC.
> > Then let's just extend this driver to support the new features. Plus,
> We do not have the platform to test also it's very old legacy driver .
Well, if it's similar enough, we want to have one driver.
> > we'll be happy to have one more of the existing driver converted to
> > ->exec_op() ;-).
>
> I have completely adapted to ->exec_op() hook up to replace the legacy
> call-back.
I suspect porting what you've done to the xway driver shouldn't be too
complicated.
next prev parent reply other threads:[~2020-04-16 10:27 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-14 2:24 [PATCH v1 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-04-14 2:24 ` [PATCH v1 1/2] dt-bindings: mtd: Add YAML for Nand Flash Controller support Ramuthevar,Vadivel MuruganX
2020-04-14 7:04 ` Boris Brezillon
2020-04-15 1:51 ` Ramuthevar, Vadivel MuruganX
2020-04-14 2:24 ` [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-04-14 7:21 ` Boris Brezillon
2020-04-15 6:01 ` Ramuthevar, Vadivel MuruganX
2020-04-15 22:05 ` Martin Blumenstingl
2020-04-16 9:35 ` Ramuthevar, Vadivel MuruganX
2020-04-16 9:38 ` Boris Brezillon
2020-04-16 9:45 ` Ramuthevar, Vadivel MuruganX
2020-04-16 10:26 ` Boris Brezillon [this message]
2020-04-16 10:40 ` Ramuthevar, Vadivel MuruganX
2020-04-16 11:17 ` Boris Brezillon
2020-04-16 11:32 ` Andy Shevchenko
2020-04-17 5:10 ` Ramuthevar, Vadivel MuruganX
[not found] ` <de9f50b8-9215-d294-9914-e49701552185@linux.intel.com>
2020-04-16 11:57 ` Boris Brezillon
2020-04-16 12:26 ` Andy Shevchenko
2020-04-16 12:40 ` Boris Brezillon
2020-04-16 13:20 ` Arnd Bergmann
2020-04-16 13:51 ` John Crispin
2020-04-20 1:09 ` Ramuthevar, Vadivel MuruganX
2020-04-16 18:08 ` Martin Blumenstingl
2020-04-17 5:21 ` Ramuthevar, Vadivel MuruganX
2020-04-17 7:02 ` Boris Brezillon
2020-04-17 7:53 ` Ramuthevar, Vadivel MuruganX
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