From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B81CEC3815B for ; Mon, 20 Apr 2020 07:40:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9141F206B8 for ; Mon, 20 Apr 2020 07:40:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725886AbgDTHkY (ORCPT ); Mon, 20 Apr 2020 03:40:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725773AbgDTHkY (ORCPT ); Mon, 20 Apr 2020 03:40:24 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC15EC061A0C; Mon, 20 Apr 2020 00:40:23 -0700 (PDT) Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 0FEDC2A0A21; Mon, 20 Apr 2020 08:40:21 +0100 (BST) Date: Mon, 20 Apr 2020 09:40:18 +0200 From: Boris Brezillon To: "Ramuthevar, Vadivel MuruganX" Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, arnd@arndb.de, brendanhiggins@google.com, tglx@linutronix.de, anders.roxell@linaro.org, masonccyang@mxic.com.tw, piotrs@cadence.com, robh+dt@kernel.org, linux-mips@vger.kernel.org, hauke.mehrtens@intel.com, andriy.shevchenko@intel.com, qi-ming.wu@intel.com, cheol.yong.kim@intel.com Subject: Re: [PATCH v2 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Message-ID: <20200420094018.6fdbda68@collabora.com> In-Reply-To: <79e186a8-68fb-0e75-910b-9f1b40679ca2@linux.intel.com> References: <20200417082147.43384-1-vadivel.muruganx.ramuthevar@linux.intel.com> <20200417082147.43384-3-vadivel.muruganx.ramuthevar@linux.intel.com> <20200418105533.477ce529@collabora.com> <79e186a8-68fb-0e75-910b-9f1b40679ca2@linux.intel.com> Organization: Collabora X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, 20 Apr 2020 12:18:34 +0800 "Ramuthevar, Vadivel MuruganX" wrote: > >> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig > >> index a80a46bb5b8b..9efc4bbaf4a3 100644 > >> --- a/drivers/mtd/nand/raw/Kconfig > >> +++ b/drivers/mtd/nand/raw/Kconfig > >> @@ -457,6 +457,13 @@ config MTD_NAND_CADENCE > >> Enable the driver for NAND flash on platforms using a Cadence NAND > >> controller. > >> > >> +config MTD_NAND_INTEL_LGM > >> + tristate "Support for NAND controller on Intel LGM SoC" > >> + depends on X86 > > Do we have a hard dependency on x86 here? Maybe 'depends on HAS_MMIO' > > would be enough. > yes Boris, we have hard dependency on x86. Given that the driver will also be used on a MIPS platform I would say no :P. Just to be clear, I was suggesting to replace the soon to emerge depends on X86 || MIPS || COMPILE_TEST depends HAS_IOMEM rule by depends on OF || COMPILE_TEST depends HAS_IOMEM