From: Shawn Guo <shawnguo@kernel.org>
To: peng.fan@nxp.com
Cc: s.hauer@pengutronix.de, robh+dt@kernel.org,
jaswinder.singh@linaro.org, linux@rempel-privat.de,
kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
Anson.Huang@nxp.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: imx8qxp: support scu mailbox channel
Date: Tue, 28 Apr 2020 16:50:20 +0800 [thread overview]
Message-ID: <20200428085019.GB32592@dragon> (raw)
In-Reply-To: <1586870668-32630-2-git-send-email-peng.fan@nxp.com>
On Tue, Apr 14, 2020 at 09:24:28PM +0800, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> With mailbox driver support i.MX8 SCU MU channel, we could
> use it to avoid trigger interrupts for each TR/RR registers
> in one MU, instead, only one RX interrupt for a recv and
> one TX interrupt for a send.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Applied, thanks.
next prev parent reply other threads:[~2020-04-28 8:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-14 13:24 [PATCH 1/2] dt-bindings: mailbox: imx-mu: correct example peng.fan
2020-04-14 13:24 ` [PATCH 2/2] arm64: dts: imx8qxp: support scu mailbox channel peng.fan
2020-04-15 5:50 ` Oleksij Rempel
2020-04-28 8:50 ` Shawn Guo [this message]
2020-04-15 5:49 ` [PATCH 1/2] dt-bindings: mailbox: imx-mu: correct example Oleksij Rempel
2020-04-20 21:07 ` Rob Herring
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