From: Qiang Zhao <qiang.zhao@nxp.com>
To: shawnguo@kernel.org
Cc: leoyang.li@nxp.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Zhao Qiang <qiang.zhao@nxp.com>
Subject: [patch v2 2/2] ls1043ardb: add ds26522 node to dts
Date: Wed, 29 Apr 2020 16:20:52 +0800 [thread overview]
Message-ID: <20200429082052.18519-2-qiang.zhao@nxp.com> (raw)
In-Reply-To: <20200429082052.18519-1-qiang.zhao@nxp.com>
From: Zhao Qiang <qiang.zhao@nxp.com>
add ds26522 node to fsl-ls1043a-rdb.dts
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index 96e87ba..b60c742 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -94,6 +94,22 @@
reg = <0>;
spi-max-frequency = <1000000>; /* input clock */
};
+
+ slic@2 {
+ compatible = "maxim,ds26522";
+ reg = <2>;
+ spi-max-frequency = <2000000>;
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <50>;
+ };
+
+ slic@3 {
+ compatible = "maxim,ds26522";
+ reg = <3>;
+ spi-max-frequency = <2000000>;
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <50>;
+ };
};
&uqe {
--
2.9.5
next prev parent reply other threads:[~2020-04-29 8:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-29 8:20 [patch v2 1/2] ls1043ardb: add qe node to ls1043ardb Qiang Zhao
2020-04-29 8:20 ` Qiang Zhao [this message]
2020-05-17 14:10 ` Shawn Guo
2020-05-18 3:40 ` Qiang Zhao
-- strict thread matches above, loose matches on Subject: below --
2016-10-09 2:12 [PATCH " Zhao Qiang
[not found] ` <1475979159-20597-1-git-send-email-qiang.zhao-3arQi8VN3Tc@public.gmane.org>
2016-10-09 2:12 ` [PATCH v2 2/2] ls1043ardb: add ds26522 node to dts Zhao Qiang
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