From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tom Joseph <tjoseph@cadence.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Andrew Murray <amurray@thegoodpenguin.co.uk>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/4] PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT
Date: Fri, 1 May 2020 16:11:31 +0100 [thread overview]
Message-ID: <20200501151131.GC7398@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <20200417114322.31111-5-kishon@ti.com>
On Fri, Apr 17, 2020 at 05:13:22PM +0530, Kishon Vijay Abraham I wrote:
> The PCI Bus Binding specification (IEEE Std 1275-1994 Revision 2.1 [1])
> defines both Vendor ID and Device ID to be 32-bits. Fix
> pcie-cadence-host.c driver to read 32-bit Vendor ID and Device ID
> properties from device tree.
>
> [1] -> https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> drivers/pci/controller/cadence/pcie-cadence-host.c | 4 ++--
> drivers/pci/controller/cadence/pcie-cadence.h | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
I don't see how you would use a 32-bit value for a 16-bit register so
certainly the struct cdns_pcie_rc fields size is questionable anyway.
I *assume* you are referring to 4.1.2.1 and the property list
encoded as "encode-int".
I would like to get RobH's opinion on this - I don't know myself
whether the PCI OF bindings you added are still relevant and how
they should be interpreted.
Thanks
Lorenzo
> diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c
> index 8f72967f298f..31e67c9c88cf 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence-host.c
> +++ b/drivers/pci/controller/cadence/pcie-cadence-host.c
> @@ -229,10 +229,10 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
> }
>
> rc->vendor_id = 0xffff;
> - of_property_read_u16(np, "vendor-id", &rc->vendor_id);
> + of_property_read_u32(np, "vendor-id", &rc->vendor_id);
>
> rc->device_id = 0xffff;
> - of_property_read_u16(np, "device-id", &rc->device_id);
> + of_property_read_u32(np, "device-id", &rc->device_id);
>
> res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "reg");
> pcie->reg_base = devm_ioremap_resource(dev, res);
> diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h
> index 6bd89a21bb1c..df14ad002fe9 100644
> --- a/drivers/pci/controller/cadence/pcie-cadence.h
> +++ b/drivers/pci/controller/cadence/pcie-cadence.h
> @@ -262,8 +262,8 @@ struct cdns_pcie_rc {
> struct resource *bus_range;
> void __iomem *cfg_base;
> u32 no_bar_nbits;
> - u16 vendor_id;
> - u16 device_id;
> + u32 vendor_id;
> + u32 device_id;
> };
>
> /**
> --
> 2.17.1
>
next prev parent reply other threads:[~2020-05-01 15:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-17 11:43 [PATCH v2 0/4] PCI: cadence: Deprecate inbound/outbound specific bindings Kishon Vijay Abraham I
2020-04-17 11:43 ` [PATCH v2 1/4] dt-bindings: " Kishon Vijay Abraham I
2020-04-17 11:43 ` [PATCH v2 2/4] PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" property Kishon Vijay Abraham I
2020-05-01 14:46 ` Lorenzo Pieralisi
2020-05-01 15:54 ` Robin Murphy
2020-05-04 8:44 ` Kishon Vijay Abraham I
2020-05-04 10:54 ` Robin Murphy
2020-05-04 12:53 ` Kishon Vijay Abraham I
2020-05-06 3:22 ` Kishon Vijay Abraham I
2020-05-07 20:26 ` Rob Herring
2020-05-08 8:49 ` Kishon Vijay Abraham I
2020-05-08 11:51 ` Kishon Vijay Abraham I
2020-04-17 11:43 ` [PATCH v2 3/4] PCI: cadence: Remove "cdns,max-outbound-regions" DT property Kishon Vijay Abraham I
2020-05-07 20:27 ` Rob Herring
2020-04-17 11:43 ` [PATCH v2 4/4] PCI: cadence: Fix to read 32-bit Vendor ID/Device ID property from DT Kishon Vijay Abraham I
2020-05-01 15:11 ` Lorenzo Pieralisi [this message]
2020-05-04 8:52 ` Kishon Vijay Abraham I
2020-05-04 11:25 ` Lorenzo Pieralisi
2020-05-07 20:27 ` Rob Herring
2020-05-06 17:16 ` [PATCH v2 0/4] PCI: cadence: Deprecate inbound/outbound specific bindings Tom Joseph
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