* [PATCH v2 0/2] Add Renesas RPC-IF support
@ 2020-04-30 20:45 Sergei Shtylyov
2020-04-30 20:47 ` [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Sergei Shtylyov
2020-05-01 9:36 ` [PATCH v2 0/2] Add Renesas RPC-IF support Geert Uytterhoeven
0 siblings, 2 replies; 8+ messages in thread
From: Sergei Shtylyov @ 2020-04-30 20:45 UTC (permalink / raw)
To: Rob Herring, devicetree
Cc: Philipp Zabel, Mason Yang, linux-spi, Chris Brandt,
linux-mtd@lists.infradead.org
Hello!
Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count
Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC
to be accessed via the external address space read mode or the manual mode.
The memory controller driver for RPC-IF registers either SPI or HyperFLash
subdevice, depending on the contents of the device tree subnode; it also
provides the abstract "back end" API that can be used by the "front end"
SPI/MTD drivers to talk to the real hardware...
Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
[1/2] dt-bindings: memory: document Renesas RPC-IF bindings
[2/2] memory: add Renesas RPC-IF driver
MBR, Sergei
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings
2020-04-30 20:45 [PATCH v2 0/2] Add Renesas RPC-IF support Sergei Shtylyov
@ 2020-04-30 20:47 ` Sergei Shtylyov
2020-05-01 21:19 ` Rob Herring
2020-05-01 21:25 ` Rob Herring
2020-05-01 9:36 ` [PATCH v2 0/2] Add Renesas RPC-IF support Geert Uytterhoeven
1 sibling, 2 replies; 8+ messages in thread
From: Sergei Shtylyov @ 2020-04-30 20:47 UTC (permalink / raw)
To: Rob Herring, devicetree; +Cc: Mason Yang, linux-spi, Chris Brandt, linux-mtd
Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or
HyperFlash connected to the SoC to be accessed via the external address
space read mode or the manual mode.
Document the device tree bindings for the Renesas RPC-IF found in the R-Car
gen3 SoCs.
Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- rewrote the bindings in YAML.
Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++
1 file changed, 88 insertions(+)
Index: linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
===================================================================
--- /dev/null
+++ linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas Reduced Pin Count Interface (RPC-IF)
+
+maintainers:
+ - Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+
+description: |
+ Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
+ be accessed via the external address space read mode or the manual mode.
+
+ The flash chip itself should be represented by a subnode of the RPC-IF node.
+ The flash interface is selected based on the "compatible" property of this
+ subnode:
+ - if it contains "jedec,spi-nor", then SPI is used;
+ - if it contains "cfi-flash", then HyperFlash is used.
+
+allOf:
+ - $ref: "/schemas/spi/spi-controller.yaml#"
+
+properties:
+ compatible:
+ items:
+ - enum:
+ renesas,r8a77980-rpc-if # device is a part of R8A77980 SoC
+ renesas,r8a77995-rpc-if # device is a part of R8A77995 SoC
+ - enum:
+ renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device
+
+ reg:
+ items:
+ - description: RPC-IF registers
+ - description: direct mapping read mode area
+ - description: write buffer area
+
+ reg-names:
+ items:
+ - const: regs
+ - const: dirmap
+ - const: wbuf
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ type: object
+ properties:
+ compatible:
+ oneOf:
+ - const: cfi-flash
+ - const: jedec,spi-nor
+
+examples:
+ - |
+ #include <dt-bindings/clock/renesas-cpg-mssr.h>
+ #include <dt-bindings/power/r8a77995-sysc.h>
+
+ spi@ee200000 {
+ compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
+ reg = <0 0xee200000 0 0x200>,
+ <0 0x08000000 0 0x4000000>,
+ <0 0xee208000 0 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ clocks = <&cpg CPG_MOD 917>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+ };
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 0/2] Add Renesas RPC-IF support
2020-04-30 20:45 [PATCH v2 0/2] Add Renesas RPC-IF support Sergei Shtylyov
2020-04-30 20:47 ` [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Sergei Shtylyov
@ 2020-05-01 9:36 ` Geert Uytterhoeven
1 sibling, 0 replies; 8+ messages in thread
From: Geert Uytterhoeven @ 2020-05-01 9:36 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Chris Brandt, Mason Yang, linux-mtd@lists.infradead.org,
Philipp Zabel, linux-spi, Marek Vasut, Linux-Renesas
CC marex, linux-renesas-soc
On Thu, Apr 30, 2020 at 10:45 PM Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count
> Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC
> to be accessed via the external address space read mode or the manual mode.
> The memory controller driver for RPC-IF registers either SPI or HyperFLash
> subdevice, depending on the contents of the device tree subnode; it also
> provides the abstract "back end" API that can be used by the "front end"
> SPI/MTD drivers to talk to the real hardware...
>
> Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
>
> [1/2] dt-bindings: memory: document Renesas RPC-IF bindings
> [2/2] memory: add Renesas RPC-IF driver
>
> MBR, Sergei
>
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings
2020-04-30 20:47 ` [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Sergei Shtylyov
@ 2020-05-01 21:19 ` Rob Herring
2020-05-15 20:16 ` Sergei Shtylyov
2020-05-01 21:25 ` Rob Herring
1 sibling, 1 reply; 8+ messages in thread
From: Rob Herring @ 2020-05-01 21:19 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: devicetree, Mason Yang, linux-spi, Chris Brandt, linux-mtd
On Thu, 30 Apr 2020 23:47:25 +0300, Sergei Shtylyov wrote:
> Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or
> HyperFlash connected to the SoC to be accessed via the external address
> space read mode or the manual mode.
>
> Document the device tree bindings for the Renesas RPC-IF found in the R-Car
> gen3 SoCs.
>
> Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
> Changes in version 2:
> - rewrote the bindings in YAML.
>
> Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++
> 1 file changed, 88 insertions(+)
>
My bot found errors running 'make dt_binding_check' on your patch:
Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml: while scanning a simple key
in "<unicode string>", line 29, column 9
could not find expected ':'
in "<unicode string>", line 30, column 1
Documentation/devicetree/bindings/Makefile:11: recipe for target 'Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.example.dts' failed
make[1]: *** [Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.example.dts] Error 1
make[1]: *** Waiting for unfinished jobs....
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml: ignoring, error parsing file
warning: no schema found in file: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml: ignoring, error parsing file
warning: no schema found in file: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
Makefile:1300: recipe for target 'dt_binding_check' failed
make: *** [dt_binding_check] Error 2
See https://patchwork.ozlabs.org/patch/1280942
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Please check and re-submit.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings
2020-04-30 20:47 ` [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Sergei Shtylyov
2020-05-01 21:19 ` Rob Herring
@ 2020-05-01 21:25 ` Rob Herring
2020-05-20 14:38 ` Sergei Shtylyov
2020-06-01 19:18 ` Sergei Shtylyov
1 sibling, 2 replies; 8+ messages in thread
From: Rob Herring @ 2020-05-01 21:25 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: devicetree, Mason Yang, linux-spi, Chris Brandt, linux-mtd
On Thu, Apr 30, 2020 at 11:47:25PM +0300, Sergei Shtylyov wrote:
> Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or
> HyperFlash connected to the SoC to be accessed via the external address
> space read mode or the manual mode.
>
> Document the device tree bindings for the Renesas RPC-IF found in the R-Car
> gen3 SoCs.
>
> Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
> Changes in version 2:
> - rewrote the bindings in YAML.
>
> Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++
Not where we normally put SPI flash controllers...
> 1 file changed, 88 insertions(+)
>
> Index: linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
> ===================================================================
> --- /dev/null
> +++ linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0)
Dual license new bindings:
(GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas Reduced Pin Count Interface (RPC-IF)
> +
> +maintainers:
> + - Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> +
> +description: |
> + Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
> + be accessed via the external address space read mode or the manual mode.
> +
> + The flash chip itself should be represented by a subnode of the RPC-IF node.
> + The flash interface is selected based on the "compatible" property of this
> + subnode:
> + - if it contains "jedec,spi-nor", then SPI is used;
> + - if it contains "cfi-flash", then HyperFlash is used.
> +
> +allOf:
> + - $ref: "/schemas/spi/spi-controller.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + renesas,r8a77980-rpc-if # device is a part of R8A77980 SoC
> + renesas,r8a77995-rpc-if # device is a part of R8A77995 SoC
Not valid yaml with tab and not valid json-schema as 'enum' is a list
(needs '-').
> + - enum:
> + renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device
> +
> + reg:
> + items:
> + - description: RPC-IF registers
> + - description: direct mapping read mode area
> + - description: write buffer area
Wrong indentation.
> +
> + reg-names:
> + items:
> + - const: regs
> + - const: dirmap
> + - const: wbuf
> +
> + clocks:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> +patternProperties:
> + "^.*@[0-9a-f]+$":
^flash@... if you're that restrictive.
> + type: object
> + properties:
> + compatible:
> + oneOf:
> + - const: cfi-flash
> + - const: jedec,spi-nor
enum is better than oneOf+const.
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/renesas-cpg-mssr.h>
> + #include <dt-bindings/power/r8a77995-sysc.h>
> +
> + spi@ee200000 {
> + compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
> + reg = <0 0xee200000 0 0x200>,
> + <0 0x08000000 0 0x4000000>,
> + <0 0xee208000 0 0x100>;
> + reg-names = "regs", "dirmap", "wbuf";
> + clocks = <&cpg CPG_MOD 917>;
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 917>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <40000000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> + };
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings
2020-05-01 21:19 ` Rob Herring
@ 2020-05-15 20:16 ` Sergei Shtylyov
0 siblings, 0 replies; 8+ messages in thread
From: Sergei Shtylyov @ 2020-05-15 20:16 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, Mason Yang, linux-spi, Chris Brandt, linux-mtd
On 05/02/2020 12:19 AM, Rob Herring wrote:
>> Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or
>> HyperFlash connected to the SoC to be accessed via the external address
>> space read mode or the manual mode.
>>
>> Document the device tree bindings for the Renesas RPC-IF found in the R-Car
>> gen3 SoCs.
>>
>> Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>
>> ---
>> Changes in version 2:
>> - rewrote the bindings in YAML.
>>
>> Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++
>> 1 file changed, 88 insertions(+)
>>
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml: while scanning a simple key
> in "<unicode string>", line 29, column 9
> could not find expected ':'
> in "<unicode string>", line 30, column 1
> Documentation/devicetree/bindings/Makefile:11: recipe for target 'Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.example.dts' failed
> make[1]: *** [Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.example.dts] Error 1
> make[1]: *** Waiting for unfinished jobs....
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml: ignoring, error parsing file
> warning: no schema found in file: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml: ignoring, error parsing file
> warning: no schema found in file: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
> Makefile:1300: recipe for target 'dt_binding_check' failed
> make: *** [dt_binding_check] Error 2
>
> See https://patchwork.ozlabs.org/patch/1280942
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure dt-schema is up to date:
>
> pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
>
> Please check and re-submit.
As I've said on IRC, I have troubles installing from dt-schema.git:
[headless@wasted renesas-devel]$ pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade
Collecting git+https://github.com/devicetree-org/dt-schema.git@master
Cloning https://github.com/devicetree-org/dt-schema.git (to master) to /tmp/pip-4f91j8zd-build
Collecting ruamel.yaml>0.15.69 (from dtschema==2020.6.dev4+g6a941d4)
Using cached https://files.pythonhosted.org/packages/a6/92/59af3e38227b9cc14520bf1e59516d99ceca53e3b8448094248171e9432b/ruamel.yaml-0.16.10-py2.py3-none-any.whl
Collecting jsonschema>=3.0.1 (from dtschema==2020.6.dev4+g6a941d4)
Using cached https://files.pythonhosted.org/packages/c5/8f/51e89ce52a085483359217bc72cdbf6e75ee595d5b1d4b5ade40c7e018b8/jsonschema-3.2.0-py2.py3-none-any.whl
Collecting rfc3987 (from dtschema==2020.6.dev4+g6a941d4)
Using cached https://files.pythonhosted.org/packages/65/d4/f7407c3d15d5ac779c3dd34fbbc6ea2090f77bd7dd12f207ccf881551208/rfc3987-1.3.8-py2.py3-none-any.whl
Collecting ruamel.yaml.clib>=0.1.2 (from ruamel.yaml>0.15.69->dtschema==2020.6.dev4+g6a941d4)
Using cached https://files.pythonhosted.org/packages/92/28/612085de3fae9f82d62d80255d9f4cf05b1b341db1e180adcf28c1bf748d/ruamel.yaml.clib-0.2.0.tar.gz
No files/directories in /tmp/pip-build-fwtgubpx/ruamel.yaml.clib/pip-egg-info (from PKG-INFO)
You are using pip version 8.0.2, however version 20.1 is available.
You should consider upgrading via the 'pip install --upgrade pip' command.
MBR, Sergei
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings
2020-05-01 21:25 ` Rob Herring
@ 2020-05-20 14:38 ` Sergei Shtylyov
2020-06-01 19:18 ` Sergei Shtylyov
1 sibling, 0 replies; 8+ messages in thread
From: Sergei Shtylyov @ 2020-05-20 14:38 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, Mason Yang, linux-spi, Chris Brandt, linux-mtd
On 02.05.2020 0:25, Rob Herring wrote:
>> Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or
>> HyperFlash connected to the SoC to be accessed via the external address
>> space read mode or the manual mode.
>>
>> Document the device tree bindings for the Renesas RPC-IF found in the R-Car
>> gen3 SoCs.
>>
>> Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>
>> ---
>> Changes in version 2:
>> - rewrote the bindings in YAML.
>>
>> Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++
>
> Not where we normally put SPI flash controllers...
RPC-IF is not exactly SPI flash controller, it's bimodal.
MBR, Sergei
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings
2020-05-01 21:25 ` Rob Herring
2020-05-20 14:38 ` Sergei Shtylyov
@ 2020-06-01 19:18 ` Sergei Shtylyov
1 sibling, 0 replies; 8+ messages in thread
From: Sergei Shtylyov @ 2020-06-01 19:18 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, Mason Yang, linux-spi, Chris Brandt, linux-mtd
On 05/02/2020 12:25 AM, Rob Herring wrote:
>> Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or
>> HyperFlash connected to the SoC to be accessed via the external address
>> space read mode or the manual mode.
>>
>> Document the device tree bindings for the Renesas RPC-IF found in the R-Car
>> gen3 SoCs.
>>
>> Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>
[...]
>> Index: linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
>> ===================================================================
>> --- /dev/null
>> +++ linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml
>> @@ -0,0 +1,88 @@
[...]
>> +patternProperties:
>> + "^.*@[0-9a-f]+$":
>
> ^flash@... if you're that restrictive.
>
>> + type: object
>> + properties:
>> + compatible:
>> + oneOf:
>> + - const: cfi-flash
>> + - const: jedec,spi-nor
>
> enum is better than oneOf+const.
- enum:
- cfi-flash
- jedec,spi-nor
causes the build error you encountered while trying to merge the last time.
What was I doing wrong?
[...]
MBR, Sergei
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-06-01 19:18 UTC | newest]
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2020-05-01 21:19 ` Rob Herring
2020-05-15 20:16 ` Sergei Shtylyov
2020-05-01 21:25 ` Rob Herring
2020-05-20 14:38 ` Sergei Shtylyov
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