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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id b19sm269926oii.1.2020.05.01.14.25.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 May 2020 14:25:48 -0700 (PDT) Received: (nullmailer pid 25490 invoked by uid 1000); Fri, 01 May 2020 21:25:48 -0000 Date: Fri, 1 May 2020 16:25:48 -0500 From: Rob Herring To: Sergei Shtylyov Cc: devicetree@vger.kernel.org, Mason Yang , linux-spi@vger.kernel.org, Chris Brandt , linux-mtd@lists.infradead.org Subject: Re: [PATCH v2 1/2] dt-bindings: memory: document Renesas RPC-IF bindings Message-ID: <20200501212547.GB15294@bogus> References: <812e6e58-d13f-3f44-5f55-22266b690c57@cogentembedded.com> <116683d1-d402-4d7f-3357-1c8cde807076@cogentembedded.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <116683d1-d402-4d7f-3357-1c8cde807076@cogentembedded.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Apr 30, 2020 at 11:47:25PM +0300, Sergei Shtylyov wrote: > Renesas Reduced Pin Count Interface (RPC-IF) allows a SPI flash or > HyperFlash connected to the SoC to be accessed via the external address > space read mode or the manual mode. > > Document the device tree bindings for the Renesas RPC-IF found in the R-Car > gen3 SoCs. > > Based on the original patch by Mason Yang . > > Signed-off-by: Sergei Shtylyov > > --- > Changes in version 2: > - rewrote the bindings in YAML. > > Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml | 88 ++++++++++ Not where we normally put SPI flash controllers... > 1 file changed, 88 insertions(+) > > Index: linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml > =================================================================== > --- /dev/null > +++ linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml > @@ -0,0 +1,88 @@ > +# SPDX-License-Identifier: (GPL-2.0) Dual license new bindings: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas Reduced Pin Count Interface (RPC-IF) > + > +maintainers: > + - Sergei Shtylyov > + > +description: | > + Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to > + be accessed via the external address space read mode or the manual mode. > + > + The flash chip itself should be represented by a subnode of the RPC-IF node. > + The flash interface is selected based on the "compatible" property of this > + subnode: > + - if it contains "jedec,spi-nor", then SPI is used; > + - if it contains "cfi-flash", then HyperFlash is used. > + > +allOf: > + - $ref: "/schemas/spi/spi-controller.yaml#" > + > +properties: > + compatible: > + items: > + - enum: > + renesas,r8a77980-rpc-if # device is a part of R8A77980 SoC > + renesas,r8a77995-rpc-if # device is a part of R8A77995 SoC Not valid yaml with tab and not valid json-schema as 'enum' is a list (needs '-'). > + - enum: > + renesas,rcar-gen3-rpc-if # a generic R-Car gen3 device > + > + reg: > + items: > + - description: RPC-IF registers > + - description: direct mapping read mode area > + - description: write buffer area Wrong indentation. > + > + reg-names: > + items: > + - const: regs > + - const: dirmap > + - const: wbuf > + > + clocks: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > +patternProperties: > + "^.*@[0-9a-f]+$": ^flash@... if you're that restrictive. > + type: object > + properties: > + compatible: > + oneOf: > + - const: cfi-flash > + - const: jedec,spi-nor enum is better than oneOf+const. > + > +examples: > + - | > + #include > + #include > + > + spi@ee200000 { > + compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; > + reg = <0 0xee200000 0 0x200>, > + <0 0x08000000 0 0x4000000>, > + <0 0xee208000 0 0x100>; > + reg-names = "regs", "dirmap", "wbuf"; > + clocks = <&cpg CPG_MOD 917>; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 917>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <40000000>; > + spi-tx-bus-width = <1>; > + spi-rx-bus-width = <1>; > + }; > + };