From: Boris Brezillon <boris.brezillon@collabora.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, <devicetree@vger.kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
<linux-mtd@lists.infradead.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Michal Simek <monstr@monstr.eu>,
Naga Sureshkumar Relli <nagasure@xilinx.com>
Subject: Re: [PATCH v3 4/8] mtd: rawnand: Add nand_extract_bits()
Date: Thu, 7 May 2020 13:49:59 +0200 [thread overview]
Message-ID: <20200507134959.38bbcdc4@collabora.com> (raw)
In-Reply-To: <20200507110034.14736-5-miquel.raynal@bootlin.com>
On Thu, 7 May 2020 13:00:30 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> There are cases where ECC bytes are not byte-aligned. Indeed, BCH
> implies using a number of ECC bits, which are not always a multiple of
> 8. We then need a helper like nand_extract_bits() to extract these
> syndromes from a buffer.
Do you plan to send a patch to make the GPMI driver use this helper?
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> drivers/mtd/nand/raw/nand_base.c | 31 +++++++++++++++++++++++++++++++
> include/linux/mtd/rawnand.h | 4 ++++
> 2 files changed, 35 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> index 25d298938aa9..b236e1bdddaf 100644
> --- a/drivers/mtd/nand/raw/nand_base.c
> +++ b/drivers/mtd/nand/raw/nand_base.c
> @@ -224,6 +224,37 @@ static int check_offs_len(struct nand_chip *chip, loff_t ofs, uint64_t len)
> return ret;
> }
>
> +/* Copy unaligned bits from one buffer to another one (no overlap) */
> +void nand_extract_bits(u8 *dst, const u8 *src, unsigned int src_off,
> + unsigned int nbits)
> +{
> + unsigned int dst_off = 0, tmp, n;
> +
> + src += src_off / 8;
> + src_off %= 8;
> +
> + while (nbits) {
> + n = min3(8 - dst_off, 8 - src_off, nbits);
> +
> + tmp = (*src >> src_off) & GENMASK(n - 1, 0);
> + *dst |= tmp << dst_off;
> +
> + dst_off += n;
> + if (dst_off >= 8) {
> + dst++;
> + dst_off -= 8;
> + }
> +
> + src_off += n;
> + if (src_off >= 8) {
> + src++;
> + src_off -= 8;
> + }
> +
> + nbits -= n;
> + }
> +}
> +
> /**
> * nand_select_target() - Select a NAND target (A.K.A. die)
> * @chip: NAND chip object
> diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
> index 406e9ff0f45c..734564232545 100644
> --- a/include/linux/mtd/rawnand.h
> +++ b/include/linux/mtd/rawnand.h
> @@ -1404,6 +1404,10 @@ int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod,
> void nand_select_target(struct nand_chip *chip, unsigned int cs);
> void nand_deselect_target(struct nand_chip *chip);
>
> +/* Bitops */
> +void nand_extract_bits(u8 *dst, const u8 *src, unsigned int src_off,
> + unsigned int nbits);
> +
> /**
> * nand_get_data_buf() - Get the internal page buffer
> * @chip: NAND chip object
next prev parent reply other threads:[~2020-05-07 11:50 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-07 11:00 [PATCH v3 0/8] New Arasan NAND controller driver Miquel Raynal
2020-05-07 11:00 ` [PATCH v3 1/8] lib/bch: Rework a little bit the exported function names Miquel Raynal
2020-05-07 11:48 ` Boris Brezillon
2020-05-07 14:11 ` Miquel Raynal
2020-05-07 11:00 ` [PATCH v3 2/8] lib/bch: Allow easy bit swapping Miquel Raynal
2020-05-07 11:43 ` Boris Brezillon
2020-05-07 14:09 ` Miquel Raynal
2020-05-07 11:00 ` [PATCH v3 3/8] mtd: rawnand: Ensure the number of bitflips is consistent Miquel Raynal
2020-05-07 11:00 ` [PATCH v3 4/8] mtd: rawnand: Add nand_extract_bits() Miquel Raynal
2020-05-07 11:49 ` Boris Brezillon [this message]
2020-05-07 14:12 ` Miquel Raynal
2020-05-08 17:20 ` Miquel Raynal
2020-05-07 11:00 ` [PATCH v3 5/8] MAINTAINERS: Add Arasan NAND controller and bindings Miquel Raynal
2020-05-07 11:50 ` Boris Brezillon
2020-05-07 11:00 ` [PATCH v3 6/8] dt-bindings: mtd: Document ARASAN NAND bindings Miquel Raynal
2020-05-07 11:00 ` [PATCH v3 7/8] mtd: rawnand: arasan: Add new Arasan NAND controller Miquel Raynal
2020-05-07 12:11 ` Boris Brezillon
2020-05-07 15:13 ` Miquel Raynal
2020-05-07 15:24 ` Boris Brezillon
2020-05-07 15:53 ` Miquel Raynal
2020-05-07 16:12 ` Boris Brezillon
2020-05-07 12:51 ` Boris Brezillon
2020-05-07 15:45 ` Miquel Raynal
2020-05-07 16:11 ` Boris Brezillon
2020-05-07 16:19 ` Miquel Raynal
2020-05-07 19:13 ` Miquel Raynal
2020-05-07 11:00 ` [PATCH v3 8/8] mtd: rawnand: arasan: Support the hardware BCH ECC engine Miquel Raynal
2020-05-07 12:03 ` Boris Brezillon
2020-05-07 15:09 ` Miquel Raynal
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