From: Andrew Lunn <andrew@lunn.ch>
To: Michael Grzeschik <m.grzeschik@pengutronix.de>
Cc: netdev@vger.kernel.org, f.fainelli@gmail.com,
davem@davemloft.net, kernel@pengutronix.de,
devicetree@vger.kernel.org
Subject: Re: [PATCH v3 2/5] dt-bindings: net: mdio-gpio: add compatible for microchip,mdio-smi0
Date: Sat, 9 May 2020 18:57:42 +0200 [thread overview]
Message-ID: <20200509165742.GD362499@lunn.ch> (raw)
In-Reply-To: <20200508154343.6074-3-m.grzeschik@pengutronix.de>
On Fri, May 08, 2020 at 05:43:40PM +0200, Michael Grzeschik wrote:
> Microchip SMI0 Mode is a special mode, where the MDIO Read/Write
> commands are part of the PHY Address and the OP Code is always 0. We add
> the compatible for this special mode of the bitbanged mdio driver.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2020-05-09 16:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20200508154343.6074-1-m.grzeschik@pengutronix.de>
2020-05-08 15:43 ` [PATCH v3 2/5] dt-bindings: net: mdio-gpio: add compatible for microchip,mdio-smi0 Michael Grzeschik
2020-05-09 16:57 ` Andrew Lunn [this message]
2020-05-09 17:16 ` Florian Fainelli
2020-05-19 18:21 ` Rob Herring
2020-05-08 15:43 ` [PATCH v3 5/5] dt-bindings: net: dsa: document additional Microchip KSZ8863/8873 switch Michael Grzeschik
2020-05-09 16:57 ` Andrew Lunn
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