Re: [PATCH 1/4] arm64: dts: qcom: msm8916: Add blsp_i2c1

[Bjorn Andersson <bjorn.andersson@linaro.org>]

On Sun 26 Apr 07:06 PDT 2020, Stephan Gerhold wrote:

> MSM8916 has another I2C QUP controller that can be enabled on
> GPIO 2 and 3.
> 
> Add blsp_i2c1 to msm8916.dtsi and disable it by default.
> 

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
> ---
> On samsung-a2015 there is an external TFA9895 speaker amplifier
> connected to blsp_i2c1. There isn't a proper mainline driver
> for it (yet?), but it's nice to have the I2C bus in mainline at least.
> ---
>  arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 24 ++++++++++++++++++++++
>  arch/arm64/boot/dts/qcom/msm8916.dtsi      | 15 ++++++++++++++
>  2 files changed, 39 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
> index 242aaea68804..b45fd12856ea 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
> @@ -262,6 +262,30 @@ pinconf {
>  		};
>  	};
>  
> +	i2c1_default: i2c1_default {
> +		pinmux {
> +			function = "blsp_i2c1";
> +			pins = "gpio2", "gpio3";
> +		};
> +		pinconf {
> +			pins = "gpio2", "gpio3";
> +			drive-strength = <2>;
> +			bias-disable;
> +		};
> +	};
> +
> +	i2c1_sleep: i2c1_sleep {
> +		pinmux {
> +			function = "gpio";
> +			pins = "gpio2", "gpio3";
> +		};
> +		pinconf {
> +			pins = "gpio2", "gpio3";
> +			drive-strength = <2>;
> +			bias-disable;
> +		};
> +	};
> +
>  	i2c2_default: i2c2_default {
>  		pinmux {
>  			function = "blsp_i2c2";
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 8b429954ea29..6ab7cabde370 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -612,6 +612,21 @@ blsp_spi6: spi@78ba000 {
>  			status = "disabled";
>  		};
>  
> +		blsp_i2c1: i2c@78b5000 {
> +			compatible = "qcom,i2c-qup-v2.2.1";
> +			reg = <0x078b5000 0x500>;
> +			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> +				 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
> +			clock-names = "iface", "core";
> +			pinctrl-names = "default", "sleep";
> +			pinctrl-0 = <&i2c1_default>;
> +			pinctrl-1 = <&i2c1_sleep>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		blsp_i2c2: i2c@78b6000 {
>  			compatible = "qcom,i2c-qup-v2.2.1";
>  			reg = <0x078b6000 0x500>;
> -- 
> 2.26.2
>