From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Serge Semin <fancer.lancer@gmail.com>,
Vinod Koul <vkoul@kernel.org>, Vineet Gupta <vgupta@synopsys.com>,
Viresh Kumar <vireshk@kernel.org>,
Dan Williams <dan.j.williams@intel.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Paul Burton <paulburton@kernel.org>,
Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
Rob Herring <robh+dt@kernel.org>, <linux-mips@vger.kernel.org>,
<devicetree@vger.kernel.org>, <dmaengine@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 3/6] dmaengine: dw: Set DMA device max segment size parameter
Date: Sun, 17 May 2020 21:22:10 +0300 [thread overview]
Message-ID: <20200517182210.jxtsqbtf3pjogxpc@mobilestation> (raw)
In-Reply-To: <20200515105313.GL185537@smile.fi.intel.com>
On Fri, May 15, 2020 at 01:53:13PM +0300, Andy Shevchenko wrote:
> On Fri, May 15, 2020 at 11:46:01AM +0530, Vinod Koul wrote:
> > On 12-05-20, 15:35, Andy Shevchenko wrote:
> > > On Tue, May 12, 2020 at 12:16:22AM +0300, Serge Semin wrote:
> > > > On Fri, May 08, 2020 at 02:21:52PM +0300, Andy Shevchenko wrote:
> > > > > On Fri, May 08, 2020 at 01:53:01PM +0300, Serge Semin wrote:
>
> ...
>
> > > My point here that we probably can avoid complications till we have real
> > > hardware where it's different. As I said I don't remember a such, except
> > > *maybe* Intel Medfield, which is quite outdated and not supported for wider
> > > audience anyway.
> >
> > IIRC Intel Medfield has couple of dma controller instances each one with
> > different parameters *but* each instance has same channel configuration.
>
> That's my memory too.
>
> > I do not recall seeing that we have synthesis parameters per channel
> > basis... But I maybe wrong, it's been a while.
>
> Exactly, that's why I think we better simplify things till we will have real
> issue with it. I.o.w. no need to solve the problem which doesn't exist.
Ok then. My hardware is also synthesized with uniform max block size
parameter. I'll remove that maximum of maximum search pattern and use the block
size found for the very first channel to set the maximum segment size parameter.
-Sergey
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
next prev parent reply other threads:[~2020-05-17 18:22 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-06 13:10 [PATCH 0/5] dmaengine: dw: Take Baikal-T1 SoC DW DMAC peculiarities into account Sergey.Semin
2020-03-06 13:29 ` Andy Shevchenko
2020-03-06 13:30 ` Andy Shevchenko
2020-03-06 13:43 ` Vinod Koul
[not found] ` <20200306135050.40094803087C@mail.baikalelectronics.ru>
2020-03-09 21:45 ` Sergey Semin
[not found] ` <20200306133756.0F74C8030793@mail.baikalelectronics.ru>
2020-03-06 13:47 ` Sergey Semin
2020-03-06 14:11 ` Andy Shevchenko
[not found] ` <20200306141135.9C4F380307C2@mail.baikalelectronics.ru>
2020-03-09 22:08 ` Sergey Semin
2020-05-08 10:52 ` [PATCH v2 0/6] " Serge Semin
2020-05-08 10:52 ` [PATCH v2 1/6] dt-bindings: dma: dw: Convert DW DMAC to DT binding Serge Semin
2020-05-18 17:50 ` Rob Herring
2020-05-08 10:53 ` [PATCH v2 2/6] dt-bindings: dma: dw: Add max burst transaction length property Serge Semin
2020-05-08 11:12 ` Andy Shevchenko
2020-05-11 20:05 ` Serge Semin
2020-05-11 21:01 ` Andy Shevchenko
2020-05-11 21:35 ` Serge Semin
2020-05-12 9:08 ` Andy Shevchenko
2020-05-12 11:49 ` Serge Semin
2020-05-12 12:38 ` Andy Shevchenko
2020-05-15 6:09 ` Vinod Koul
2020-05-15 10:51 ` Andy Shevchenko
2020-05-15 10:56 ` Vinod Koul
2020-05-15 11:11 ` Serge Semin
2020-05-17 17:47 ` Serge Semin
2020-05-18 17:30 ` Rob Herring
2020-05-18 19:30 ` Serge Semin
2020-05-19 17:13 ` Vinod Koul
2020-05-21 1:33 ` Serge Semin
2020-05-08 10:53 ` [PATCH v2 3/6] dmaengine: dw: Set DMA device max segment size parameter Serge Semin
2020-05-08 11:21 ` Andy Shevchenko
2020-05-08 18:49 ` Vineet Gupta
2020-05-11 21:16 ` Serge Semin
2020-05-12 12:35 ` Andy Shevchenko
2020-05-12 17:01 ` Serge Semin
2020-05-15 6:16 ` Vinod Koul
2020-05-15 10:53 ` Andy Shevchenko
2020-05-17 18:22 ` Serge Semin [this message]
2020-05-08 10:53 ` [PATCH v2 4/6] dmaengine: dw: Print warning if multi-block is unsupported Serge Semin
2020-05-08 11:26 ` Andy Shevchenko
2020-05-08 11:53 ` Mark Brown
2020-05-08 19:06 ` Andy Shevchenko
2020-05-11 3:13 ` Serge Semin
2020-05-11 14:03 ` Andy Shevchenko
2020-05-11 2:10 ` Serge Semin
2020-05-11 11:58 ` Mark Brown
2020-05-11 13:45 ` Serge Semin
2020-05-11 13:58 ` Andy Shevchenko
2020-05-11 17:48 ` Mark Brown
2020-05-11 18:25 ` Serge Semin
2020-05-11 19:32 ` Serge Semin
2020-05-11 21:07 ` Andy Shevchenko
2020-05-11 21:08 ` Andy Shevchenko
2020-05-12 12:42 ` Serge Semin
2020-05-15 6:30 ` Vinod Koul
2020-05-17 19:23 ` Serge Semin
2020-05-19 17:02 ` Vinod Koul
2020-05-21 1:40 ` Serge Semin
2020-05-11 17:44 ` Mark Brown
2020-05-11 18:32 ` Serge Semin
2020-05-11 21:32 ` Mark Brown
2020-05-08 10:53 ` [PATCH v2 5/6] dmaengine: dw: Introduce max burst length hw config Serge Semin
2020-05-08 11:41 ` Andy Shevchenko
2020-05-12 14:08 ` Serge Semin
2020-05-12 19:12 ` Andy Shevchenko
2020-05-12 19:47 ` Serge Semin
2020-05-15 11:02 ` Andy Shevchenko
2020-05-15 6:39 ` Vinod Koul
2020-05-17 19:38 ` Serge Semin
2020-05-19 17:07 ` Vinod Koul
2020-05-21 1:47 ` Serge Semin
2020-05-08 10:53 ` [PATCH v2 6/6] dmaengine: dw: Take HC_LLP flag into account for noLLP auto-config Serge Semin
2020-05-08 11:43 ` Andy Shevchenko
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