From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35C38C433E1 for ; Wed, 20 May 2020 12:45:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0460720758 for ; Wed, 20 May 2020 12:45:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="HOfRPl1o" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726892AbgETMpn (ORCPT ); Wed, 20 May 2020 08:45:43 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:34340 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726839AbgETMpn (ORCPT ); Wed, 20 May 2020 08:45:43 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 04KCjRXk118761; Wed, 20 May 2020 07:45:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1589978728; bh=IcP5VbLlGy8fVSZstLhchJxvgH8Y6DoVDDnUKRkJxro=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HOfRPl1oQ+u14otoqG+6AqhXLjChF2J8m7L139gF3EN8Xf37LHKr9A5dbMjQlv8f3 oTH3VcgSw4hS8ryUISc+axPhxj8Djstz6WAiRiGn3xjfJFPsZ72RPwkEwN1hhnID9g Nev4rzPfvftDnXRwYSAtIP/onLQZ/cTXkEF7D1oI= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 04KCjRE2001565 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 May 2020 07:45:27 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 20 May 2020 07:45:27 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 20 May 2020 07:45:27 -0500 Received: from lokesh-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 04KCiuvR026764; Wed, 20 May 2020 07:45:24 -0500 From: Lokesh Vutla To: Marc Zyngier , Rob Herring CC: Thomas Gleixner , Nishanth Menon , Tero Kristo , Santosh Shilimkar , Linux ARM Mailing List , Sekhar Nori , Grygorii Strashko , Peter Ujfalusi , Device Tree Mailing List , Lokesh Vutla Subject: [PATCH 07/12] dt-bindings: irqchip: ti,sci-inta: Update docs to support different parent. Date: Wed, 20 May 2020 18:14:49 +0530 Message-ID: <20200520124454.10532-8-lokeshvutla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200520124454.10532-1-lokeshvutla@ti.com> References: <20200520124454.10532-1-lokeshvutla@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Drop the firmware related interrupt ranges and use the hardware specified interrupt numbers within Interrupt Aggregator. This ensures interrupt aggregator DT node need not assume any interrupt parent type. Signed-off-by: Lokesh Vutla --- .../interrupt-controller/ti,sci-inta.txt | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt index 7841cb099e13..b14abec580a2 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt @@ -43,13 +43,14 @@ TISCI Interrupt Aggregator Node: - msi-controller: Identifies the node as an MSI controller. - interrupt-parent: phandle of irq parent. - ti,sci: Phandle to TI-SCI compatible System controller node. -- ti,sci-dev-id: TISCI device ID of the Interrupt Aggregator. -- ti,sci-rm-range-vint: Array of TISCI subtype ids representing vints(inta - outputs) range within this INTA, assigned to the - requesting host context. -- ti,sci-rm-range-global-event: Array of TISCI subtype ids representing the - global events range reaching this IA and are assigned - to the requesting host context. +- ti,sci-dev-id: TISCI device id of interrupt controller. +- ti,interrupt-ranges: Set of triplets containing ranges that convert + the INTA output interrupt numbers to parent's + interrupt number. Each triplet has following entries: + - First entry specifies the base for vint + - Second entry specifies the base for parent irqs + - Third entry specifies the limit + Example: -------- @@ -61,6 +62,5 @@ main_udmass_inta: interrupt-controller@33d00000 { interrupt-parent = <&main_navss_intr>; ti,sci = <&dmsc>; ti,sci-dev-id = <179>; - ti,sci-rm-range-vint = <0x0>; - ti,sci-rm-range-global-event = <0x1>; + interrupt-ranges = <0 0 256>; }; -- 2.17.1