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[89.246.104.56]) by smtp.gmail.com with ESMTPSA id 18sm7329042wmj.19.2020.05.21.12.50.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2020 12:50:30 -0700 (PDT) Date: Thu, 21 May 2020 21:50:28 +0200 From: Drew Fustini To: Linus Walleij , Grygorii Strashko , =?iso-8859-1?Q?Beno=EEt?= Cousson , Tony Lindgren , Rob Herring , Linux-OMAP , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jason Kridner , Robert Nelson Subject: [PATCH] arm: dts: am335x-boneblack: add gpio-line-names Message-ID: <20200521195028.GB429020@x1> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add gpio-line-names properties to the GPIO controller nodes. The BeagleBone Black has P8 and P9 headers [0] which expose many of the AM3358 ZCZ SoC balls to stacking expansion boards called "capes", or to other external connections like jumper wires connected to a breadboard. BeagleBone users will often refer to the "Cape Exanpsion Headers" pin diagram [1] as it is in the "Bone101" getting started tutorial. [2] Most of the P8 and P9 header pins can muxed to a GPIO line. The gpio-line-names describe which P8 or P9 pin that line goes to and the default mux for that P8 or P9 pin if it is not GPIO. For example, gpiochip 1 line 0 is connected to P8 header pin 25 (P8_25) however the default device tree has the corresponding BGA ball (ZCZ U7) muxed to mmc1_dat0 as it is used for the on-board eMMC chip. For that GPIO line to be used, one would need to modify the device tree to disable the eMMC and change the pin mux for that ball to GPIO mode. Some of the AM3358 ZCZ balls corresponding to GPIO lines are not routed to a P8 or P9 header, but are instead wired to some peripheral device like on-board eMMC, HDMI framer IC, or status LEDs. Those names are in brackets to denote those GPIO lines can not be used. Some GPIO lines are named "[NC]" as the corresponding balls are not routed to anything on the PCB. The goal for these names is to make it easier for a user viewing the output of gpioinfo to determine which P8 or P9 pin is connected to a GPIO line. The output of gpioinfo on a BeagleBone Black would be: [0] https://git.io/JfgOd [1] https://beagleboard.org/capes [1] https://beagleboard.org/Support/bone101 [2] https://beagleboard.org/static/images/cape-headers.png Reviewed-by: Jason Kridner Reviewed-by: Robert Nelson Signed-off-by: Drew Fustini --- V1 note: I had posted a patch with these line names for am335x-bone-common.dtsi but Grygorii Strashko pointed out that the names are not applicable to all BeagleBone models. Thus is have created this patch to add these names just for the BeagleBone Black. arch/arm/boot/dts/am335x-boneblack.dts | 144 +++++++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index d3928662aed4..5f31e832eb82 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -23,3 +23,147 @@ oppnitro-1000000000 { opp-supported-hw = <0x06 0x0100>; }; }; + +&gpio0 { + gpio-line-names = + "[ethernet]", + "[ethernet]", + "P9_22 [spi0_sclk]", + "P9_21 [spi0_d0]", + "P9_18 [spi0_d1]", + "P9_17 [spi0_cs0]", + "[sd card]", + "P9_42A [ecappwm0]", + "P8_35 [hdmi]", + "P8_33 [hdmi]", + "P8_31 [hdmi]", + "P8_32 [hdmi]", + "P9_20 [i2c2_sda]", + "P9_19 [i2c2_scl]", + "P9_26 [uart1_rxd]", + "P9_24 [uart1_txd]", + "[ethernet]", + "[ethernet]", + "[usb]", + "[hdmi]", + "P9_41B", + "[ethernet]", + "P8_19 [ehrpwm2a]", + "P8_13 [ehrpwm2b]", + "[NC]", + "[NC]", + "P8_14", + "P8_17", + "[ethernet]", + "[ethernet]", + "P9_11 [uart4_rxd]", + "P9_13 [uart4_txd]"; +}; + +&gpio1 { + gpio-line-names = + "P8_25 [emmc]", + "[emmc]", + "P8_5 [emmc]", + "P8_6 [emmc]", + "P8_23 [emmc]", + "P8_22 [emmc]", + "P8_3 [emmc]", + "P8_4 [emmc]", + "[NC]", + "[NC]", + "[NC]", + "[NC]", + "P8_12", + "P8_11", + "P8_16", + "P8_15", + "P9_15A", + "P9_23", + "P9_14 [ehrpwm1a]", + "P9_16 [ehrpwm1b]", + "[emmc]", + "[usr0 led]", + "[usr1 led]", + "[usr2 led]", + "[usr3 led]", + "[hdmi]", + "[usb]", + "[hdmi audio]", + "P9_12", + "P8_26", + "P8_21 [emmc]", + "P8_20 [emmc]"; +}; + +&gpio2 { + gpio-line-names = + "P9_15B", + "P8_18", + "P8_7", + "P8_8", + "P8_10", + "P8_9", + "P8_45 [hdmi]", + "P8_46 [hdmi]", + "P8_43 [hdmi]", + "P8_44 [hdmi]", + "P8_41 [hdmi]", + "P8_42 [hdmi]", + "P8_39 [hdmi]", + "P8_40 [hdmi]", + "P8_37 [hdmi]", + "P8_38 [hdmi]", + "P8_36 [hdmi]", + "P8_34 [hdmi]", + "[ethernet]", + "[ethernet]", + "[ethernet]", + "[ethernet]", + "P8_27 [hdmi]", + "P8_29 [hdmi]", + "P8_28 [hdmi]", + "P8_30 [hdmi]", + "[emmc]", + "[emmc]", + "[emmc]", + "[emmc]", + "[emmc]", + "[emmc]"; +}; + +&gpio3 { + gpio-line-names = + "[ethernet]", + "[ethernet]", + "[ethernet]", + "[ethernet]", + "[ethernet]", + "[i2c0]", + "[i2c0]", + "[emu]", + "[emu]", + "[ethernet]", + "[ethernet]", + "[NC]", + "[NC]", + "[usb]", + "P9_31 [spi1_sclk]", + "P9_29 [spi1_d0]", + "P9_30 [spi1_d1]", + "P9_28 [spi1_cs0]", + "P9_42B [ecappwm0]", + "P9_27", + "P9_41A", + "P9_25", + "[NC]", + "[NC]", + "[NC]", + "[NC]", + "[NC]", + "[NC]", + "[NC]", + "[NC]", + "[NC]", + "[NC]"; +}; -- 2.25.1