From: Paul Cercueil <paul@crapouillou.net>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: od@zcrc.me, devicetree@vger.kernel.org,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
Paul Cercueil <paul@crapouillou.net>
Subject: [PATCH 2/3] MIPS: ingenic: Add support for GCW Zero prototype
Date: Mon, 25 May 2020 19:41:54 +0200 [thread overview]
Message-ID: <20200525174155.457491-2-paul@crapouillou.net> (raw)
In-Reply-To: <20200525174155.457491-1-paul@crapouillou.net>
Add support for the GCW Zero prototype. The only (?) difference is that
it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail
device.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
arch/mips/boot/dts/ingenic/gcw0_proto.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
create mode 100644 arch/mips/boot/dts/ingenic/gcw0_proto.dts
diff --git a/arch/mips/boot/dts/ingenic/gcw0_proto.dts b/arch/mips/boot/dts/ingenic/gcw0_proto.dts
new file mode 100644
index 000000000000..02df22f8ae0f
--- /dev/null
+++ b/arch/mips/boot/dts/ingenic/gcw0_proto.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "gcw0.dts"
+
+/ {
+ model = "GCW Zero Prototype";
+};
+
+&memory {
+ /* Prototype has only 256 MiB of RAM */
+ reg = <0x0 0x10000000>;
+};
--
2.26.2
next prev parent reply other threads:[~2020-05-25 17:42 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-25 17:41 [PATCH 1/3] MIPS: ingenic: DTS: Add memory info of GCW Zero Paul Cercueil
2020-05-25 17:41 ` Paul Cercueil [this message]
2020-05-25 17:41 ` [PATCH 3/3] MIPS: ingenic: Default to a generic board Paul Cercueil
2020-05-27 11:36 ` [PATCH 1/3] MIPS: ingenic: DTS: Add memory info of GCW Zero Thomas Bogendoerfer
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