From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2753FC433E0 for ; Thu, 28 May 2020 07:40:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F37942145D for ; Thu, 28 May 2020 07:40:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="xcvefQ30" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725920AbgE1Hkd (ORCPT ); Thu, 28 May 2020 03:40:33 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:28850 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725971AbgE1Hkd (ORCPT ); Thu, 28 May 2020 03:40:33 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 04S7cFQF026434; Thu, 28 May 2020 09:40:10 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=7wBCl4WI/PC8J0q2gdP42b4NMef/7EwZxJ8kd+yOVNQ=; b=xcvefQ30N58WAvBeWGF6NRuCxjbLg+qxe2QLbK0CZfhroMsAjlWWtuqaa5d42Ax0eiUa +CB8snlpsJEwQ1vU6WJdV67vhMcwwV+IKHwUOyIVnqK/nLjsbC0T/b+BuLKkg1jRm6ke e9+owBlGh4zK3ypiCPTD64OnMwVUayThUDmln9ey7RXjsHcRqWW01ujU0QQtVaoAKS8V 4HgAFofH0IEwlksh+nPgd69NjDKdhoDQNGevrtEo1Tl+kGJAINPekblERCyPG6DUPfd6 Cz6oC5fJnrlMrOyIQtzhr73mCANNaql46RcpnlY5McOYhOzaC8Vod6d5KN4Pj14KKlhj lQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 316skwj22f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 28 May 2020 09:40:10 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 197BE10003B; Thu, 28 May 2020 09:40:09 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E551A2B1885; Thu, 28 May 2020 09:40:08 +0200 (CEST) Received: from localhost (10.75.127.44) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 28 May 2020 09:40:08 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH 1/2] ARM: dts: stm32: fix uart nodes ordering in stm32mp15-pinctrl Date: Thu, 28 May 2020 09:40:02 +0200 Message-ID: <20200528074003.24875-2-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200528074003.24875-1-erwan.leray@st.com> References: <20200528074003.24875-1-erwan.leray@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG7NODE1.st.com (10.75.127.19) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216,18.0.687 definitions=2020-05-28_02:2020-05-28,2020-05-27 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix usart and uart nodes ordering. Several usart nodes didn't respect expecting ordering. Fixes: 077e0638fc83 ("ARM: dts: stm32: Add alternate pinmux for USART2 pins on stm32mp15") Signed-off-by: Erwan Le Ray diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 7cf535dc05f5..5ff1323236e1 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1574,67 +1574,6 @@ }; }; - usart2_pins_a: usart2-0 { - pins1 { - pinmux = , /* USART2_TX */ - ; /* USART2_RTS */ - bias-disable; - drive-push-pull; - slew-rate = <0>; - }; - pins2 { - pinmux = , /* USART2_RX */ - ; /* USART2_CTS_NSS */ - bias-disable; - }; - }; - - usart2_sleep_pins_a: usart2-sleep-0 { - pins { - pinmux = , /* USART2_TX */ - , /* USART2_RTS */ - , /* USART2_RX */ - ; /* USART2_CTS_NSS */ - }; - }; - - usart2_pins_b: usart2-1 { - pins1 { - pinmux = , /* USART2_TX */ - ; /* USART2_RTS */ - bias-disable; - drive-push-pull; - slew-rate = <0>; - }; - pins2 { - pinmux = , /* USART2_RX */ - ; /* USART2_CTS_NSS */ - bias-disable; - }; - }; - - usart2_sleep_pins_b: usart2-sleep-1 { - pins { - pinmux = , /* USART2_TX */ - , /* USART2_RTS */ - , /* USART2_RX */ - ; /* USART2_CTS_NSS */ - }; - }; - - usart3_pins_a: usart3-0 { - pins1 { - pinmux = ; /* USART3_TX */ - bias-disable; - drive-push-pull; - slew-rate = <0>; - }; - pins2 { - pinmux = ; /* USART3_RX */ - bias-disable; - }; - }; - uart4_pins_a: uart4-0 { pins1 { pinmux = ; /* UART4_TX */ @@ -1732,6 +1671,67 @@ }; }; + usart2_pins_a: usart2-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_sleep_pins_a: usart2-sleep-0 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; + + usart2_pins_b: usart2-1 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_sleep_pins_b: usart2-sleep-1 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; + + usart3_pins_a: usart3-0 { + pins1 { + pinmux = ; /* USART3_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* USART3_RX */ + bias-disable; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ -- 2.17.1