From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B30ECC433E0 for ; Wed, 3 Jun 2020 09:31:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8A5A42067B for ; Wed, 3 Jun 2020 09:31:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725888AbgFCJbv (ORCPT ); Wed, 3 Jun 2020 05:31:51 -0400 Received: from segapp02.wistron.com ([103.200.3.19]:59505 "EHLO segapp03.wistron.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725854AbgFCJbv (ORCPT ); Wed, 3 Jun 2020 05:31:51 -0400 X-Greylist: delayed 303 seconds by postgrey-1.27 at vger.kernel.org; Wed, 03 Jun 2020 05:31:29 EDT Received: from EXCHAPP04.whq.wistron (unverified [10.37.38.27]) by TWNHUMSW4.wistron.com (Clearswift SMTPRS 5.6.0) with ESMTP id ; Wed, 3 Jun 2020 17:26:25 +0800 Received: from EXCHAPP01.whq.wistron (10.37.38.24) by EXCHAPP04.whq.wistron (10.37.38.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Wed, 3 Jun 2020 17:26:23 +0800 Received: from gitserver.wistron.com (10.37.38.233) by EXCHAPP01.whq.wistron (10.37.38.24) with Microsoft SMTP Server id 15.1.1913.5 via Frontend Transport; Wed, 3 Jun 2020 17:26:23 +0800 From: Ben Pai To: , , , , , , , CC: , Ben Pai Subject: [PATCH v1] ARM: dts: aspeed: mihawk: add aliases for i2c and add thermal sensor Date: Wed, 3 Jun 2020 17:26:22 +0800 Message-ID: <20200603092622.1404-1-Ben_Pai@wistron.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" X-TM-SNTS-SMTP: 6710D34E1019471E9B085758383E8462A9B51711E9DCC8DF2EC2BE1F4835B81E2000:8 Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1.Set the bus id for each mux channel to avoid switching channels multiple times 2.Set smbus_en of IO expander to 1 in order to be able to read tmp401 sensor 3.Add 8 tmp401 thermal sensors Signed-off-by: Ben Pai --- arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts | 449 +++++++++++++++++++- 1 file changed, 444 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts index f7e935ede919..78451b283d93 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts @@ -7,7 +7,52 @@ / { model = "Mihawk BMC"; compatible = "ibm,mihawk-bmc", "aspeed,ast2500"; - + aliases { + i2c215 = &bus6_mux215; + i2c216 = &bus6_mux216; + i2c217 = &bus6_mux217; + i2c218 = &bus6_mux218; + i2c219 = &bus6_mux219; + i2c220 = &bus6_mux220; + i2c221 = &bus6_mux221; + i2c222 = &bus6_mux222; + i2c223 = &bus7_mux223; + i2c224 = &bus7_mux224; + i2c225 = &bus7_mux225; + i2c226 = &bus7_mux226; + i2c227 = &bus7_mux227; + i2c228 = &bus7_mux228; + i2c229 = &bus7_mux229; + i2c230 = &bus7_mux230; + i2c231 = &bus9_mux231; + i2c232 = &bus9_mux232; + i2c233 = &bus9_mux233; + i2c234 = &bus9_mux234; + i2c235 = &bus9_mux235; + i2c236 = &bus9_mux236; + i2c237 = &bus9_mux237; + i2c238 = &bus9_mux238; + i2c239 = &bus10_mux239; + i2c240 = &bus10_mux240; + i2c241 = &bus10_mux241; + i2c242 = &bus10_mux242; + i2c243 = &bus10_mux243; + i2c244 = &bus10_mux244; + i2c245 = &bus10_mux245; + i2c246 = &bus10_mux246; + i2c247 = &bus12_mux247; + i2c248 = &bus12_mux248; + i2c249 = &bus12_mux249; + i2c250 = &bus12_mux250; + i2c251 = &bus13_mux251; + i2c252 = &bus13_mux252; + i2c253 = &bus13_mux253; + i2c254 = &bus13_mux254; + i2c255 = &bus13_mux255; + i2c256 = &bus13_mux256; + i2c257 = &bus13_mux257; + i2c258 = &bus13_mux258; + }; chosen { stdout-path = &uart5; @@ -630,6 +675,55 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x70>; + + bus6_mux215: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + bus6_mux216: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + bus6_mux217: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + bus6_mux218: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + + bus6_mux219: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + bus6_mux220: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + bus6_mux221: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + + bus6_mux222: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; }; @@ -644,6 +738,55 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x70>; + + bus7_mux223: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + bus7_mux224: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + bus7_mux225: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + bus7_mux226: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + + bus7_mux227: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + bus7_mux228: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + bus7_mux229: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + + bus7_mux230: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; }; @@ -684,6 +827,68 @@ i2c-mux-idle-disconnect; interrupt-controller; #interrupt-cells = <2>; + + bus9_mux231: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus0 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus0"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus9_mux232: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus1 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus1"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus9_mux233: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + bus9_mux234: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; }; pca9545@71 { @@ -695,6 +900,68 @@ i2c-mux-idle-disconnect; interrupt-controller; #interrupt-cells = <2>; + + bus9_mux235: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus2 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus2"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus9_mux236: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus3 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus3"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus9_mux237: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + bus9_mux238: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; }; }; @@ -725,6 +992,68 @@ i2c-mux-idle-disconnect; interrupt-controller; #interrupt-cells = <2>; + + bus10_mux239: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus4 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus4"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus10_mux240: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus5 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus5"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus10_mux241: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + bus10_mux242: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; }; pca9545@71 { @@ -736,6 +1065,68 @@ i2c-mux-idle-disconnect; interrupt-controller; #interrupt-cells = <2>; + + bus10_mux243: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus6 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus6"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus10_mux244: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + tca9554@39 { + compatible = "ti,tca9554"; + reg = <0x39>; + gpio-controller; + #gpio-cells = <2>; + + smbus7 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "smbus7"; + }; + }; + + tmp431@4c { + compatible = "ti,tmp401"; + reg = <0x4c>; + }; + }; + + bus10_mux245: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + bus10_mux246: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; }; }; @@ -796,7 +1187,7 @@ interrupt-controller; #interrupt-cells = <2>; - i2c@0 { + bus12_mux247: i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; @@ -807,7 +1198,7 @@ }; }; - i2c@1 { + bus12_mux248: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; @@ -818,7 +1209,7 @@ }; }; - i2c@2 { + bus12_mux249: i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; @@ -829,7 +1220,7 @@ }; }; - i2c@3 { + bus12_mux250: i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; @@ -857,6 +1248,54 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x70>; + + bus13_mux251: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + bus13_mux252: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + bus13_mux253: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + bus13_mux254: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + + bus13_mux255: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + bus13_mux256: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + bus13_mux257: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + + bus13_mux258: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; }; }; -- 2.17.1 --------------------------------------------------------------------------------------------------------------------------------------------------------------- This email contains confidential or legally privileged information and is for the sole use of its intended recipient. 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