From: Rob Herring <robh@kernel.org>
To: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
Cc: rick.tyliu@ingenic.com, dongsheng.qiu@ingenic.com,
zhenwenjin@gmail.com, aric.pzqi@ingenic.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
yanfei.li@ingenic.com, tsbogend@alpha.franken.de,
paul@crapouillou.net, sernia.zhou@foxmail.com,
linux-mips@vger.kernel.org, robh+dt@kernel.org
Subject: Re: [PATCH v2 1/1] dt-bindings: MIPS: Document Ingenic SoCs binding.
Date: Wed, 10 Jun 2020 13:50:07 -0600 [thread overview]
Message-ID: <20200610195007.GA3606682@bogus> (raw)
In-Reply-To: <20200602183354.39707-2-zhouyanjie@wanyeetech.com>
On Wed, 03 Jun 2020 02:33:54 +0800, 周琰杰 (Zhou Yanjie) wrote:
> Document the available properties for the SoC root node and the
> CPU nodes of the devicetree for the Ingenic XBurst SoCs.
>
> Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
> Tested-by: Paul Boddie <paul@boddie.org.uk>
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
> ---
>
> Notes:
> v1->v2:
> 1.Remove unnecessary "items".
> 2.Add "clocks" as suggested by Paul Cercueil.
>
> .../bindings/mips/ingenic/ingenic,cpu.yaml | 67 ++++++++++++++++++++++
> 1 file changed, 67 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2020-06-10 19:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-02 18:33 [PATCH v2 0/1] Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie)
2020-06-02 18:33 ` [PATCH v2 1/1] dt-bindings: MIPS: " 周琰杰 (Zhou Yanjie)
2020-06-10 19:50 ` Rob Herring [this message]
2020-06-19 11:05 ` Thomas Bogendoerfer
2020-06-29 19:28 ` Fabio Estevam
2020-07-02 10:12 ` Thomas Bogendoerfer
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