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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	stable@vger.kernel.org,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Paul Burton <paulburton@kernel.org>,
	Ralf Baechle <ralf@linux-mips.org>, Arnd Bergmann <arnd@arndb.de>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, Sasha Levin <sashal@kernel.org>
Subject: [PATCH 5.7 202/376] mips: MAAR: Use more precise address mask
Date: Fri, 19 Jun 2020 16:32:00 +0200	[thread overview]
Message-ID: <20200619141719.904184704@linuxfoundation.org> (raw)
In-Reply-To: <20200619141710.350494719@linuxfoundation.org>

From: Serge Semin <Sergey.Semin@baikalelectronics.ru>

[ Upstream commit bbb5946eb545fab8ad8f46bce8a803e1c0c39d47 ]

Indeed according to the MIPS32 Privileged Resource Architecgture the MAAR
pair register address field either takes [12:31] bits for non-XPA systems
and [12:55] otherwise. In any case the current address mask is just
wrong for 64-bit and 32-bits XPA chips. So lets extend it to 59-bits
of physical address value. This shall cover the 64-bits architecture and
systems with XPA enabled, and won't cause any problem for non-XPA 32-bit
systems, since address values exceeding the architecture specific MAAR
mask will be just truncated with setting zeros in the unsupported upper
bits.

Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 arch/mips/include/asm/mipsregs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 796fe47cfd17..274c2bf0d4a1 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -753,7 +753,7 @@
 
 /* MAAR bit definitions */
 #define MIPS_MAAR_VH		(_U64CAST_(1) << 63)
-#define MIPS_MAAR_ADDR		((BIT_ULL(BITS_PER_LONG - 12) - 1) << 12)
+#define MIPS_MAAR_ADDR		GENMASK_ULL(55, 12)
 #define MIPS_MAAR_ADDR_SHIFT	12
 #define MIPS_MAAR_S		(_ULCAST_(1) << 1)
 #define MIPS_MAAR_VL		(_ULCAST_(1) << 0)
-- 
2.25.1




  parent reply	other threads:[~2020-06-19 15:49 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200619141710.350494719@linuxfoundation.org>
2020-06-19 14:29 ` [PATCH 5.7 057/376] mips: Fix cpu_has_mips64r1/2 activation for MIPS32 CPUs Greg Kroah-Hartman
2020-06-19 14:29 ` [PATCH 5.7 058/376] spi: dw: Enable interrupts in accordance with DMA xfer mode Greg Kroah-Hartman
2020-06-19 14:29 ` [PATCH 5.7 060/376] clocksource: dw_apb_timer: Make CPU-affiliation being optional Greg Kroah-Hartman
2020-06-19 14:29 ` [PATCH 5.7 061/376] clocksource: dw_apb_timer_of: Fix missing clockevent timers Greg Kroah-Hartman
2020-06-19 14:29 ` [PATCH 5.7 075/376] spi: dw: Fix Rx-only DMA transfers Greg Kroah-Hartman
2020-06-19 14:31 ` [PATCH 5.7 160/376] mips: cm: Fix an invalid error code of INTVN_*_ERR Greg Kroah-Hartman
2020-06-19 14:32 ` Greg Kroah-Hartman [this message]
2020-06-19 14:32 ` [PATCH 5.7 205/376] mips: Add udelay lpj numbers adjustment Greg Kroah-Hartman
2020-06-19 14:32 ` [PATCH 5.7 238/376] spi: dw: Return any value retrieved from the dma_transfer callback Greg Kroah-Hartman

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