From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B7DDC433DF for ; Wed, 8 Jul 2020 05:00:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4915E207BB for ; Wed, 8 Jul 2020 05:00:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="Vv35PyX4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728885AbgGHFAR (ORCPT ); Wed, 8 Jul 2020 01:00:17 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:4006 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728234AbgGHFAR (ORCPT ); Wed, 8 Jul 2020 01:00:17 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 07 Jul 2020 21:59:23 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 07 Jul 2020 22:00:17 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 07 Jul 2020 22:00:17 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 8 Jul 2020 05:00:14 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 8 Jul 2020 05:00:14 +0000 Received: from vdumpa-ubuntu.nvidia.com (Not Verified[172.17.173.140]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 07 Jul 2020 22:00:14 -0700 From: Krishna Reddy To: , , , , , CC: , , , , , , , , , , , , , , Krishna Reddy Subject: [PATCH v10 4/5] dt-bindings: arm-smmu: add binding for Tegra194 SMMU Date: Tue, 7 Jul 2020 22:00:16 -0700 Message-ID: <20200708050017.31563-5-vdumpa@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200708050017.31563-1-vdumpa@nvidia.com> References: <20200708050017.31563-1-vdumpa@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1594184363; bh=6CQp2EndGAsHY5pa6z4bimVuwFcu5YXxg7pdSknaz1U=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=Vv35PyX4GM09po/mN/t4So3jMjaV0A+3RTQXJ3prkzwKp7XHgrR4e9Ad98RkoB+xc az4hnTtvvZJqavTVeg2DwtrS1bVOGirdyWWFYJHcZTSFTrYUZExLPYqjrWEGwgXcH3 6Ix182QGpDqQLbaM24LG/cPEeLQ0mTOT3ws5hNlLKkQa7IgBRd4BCPHI9aE9iRGYgk 2F8etHa/pdEv0bO9vVXDfAGf1jSfgEpWNiicQcYKhBN466PL81oHDI3DKEZ4tzdAoS KXwNq8GRLdyQ4GLGr4/3pxNKKsRzNFm09wSdYdyKYpvZjVZ6yAIDhn0sLPpkxIl6pM Y4R0F9Nf8DVYQ== Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding for NVIDIA's Tegra194 SoC SMMU. Signed-off-by: Krishna Reddy --- .../devicetree/bindings/iommu/arm,smmu.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Docume= ntation/devicetree/bindings/iommu/arm,smmu.yaml index d7ceb4c34423..ac1f526c3424 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -38,6 +38,11 @@ properties: - qcom,sc7180-smmu-500 - qcom,sdm845-smmu-500 - const: arm,mmu-500 + - description: NVIDIA SoCs that program two ARM MMU-500s identically + items: + - enum: + - nvidia,tegra194-smmu + - const: nvidia,smmu-500 - items: - const: arm,mmu-500 - const: arm,smmu-v2 @@ -138,6 +143,19 @@ required: =20 additionalProperties: false =20 +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra194-smmu + then: + properties: + reg: + minItems: 2 + maxItems: 2 + examples: - |+ /* SMMU with stream matching or stream indexing */ --=20 2.26.2