From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.7 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC3CDC433E0 for ; Thu, 9 Jul 2020 13:54:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9DFAD20772 for ; Thu, 9 Jul 2020 13:54:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=marek-ca.20150623.gappssmtp.com header.i=@marek-ca.20150623.gappssmtp.com header.b="Z6NRe/KH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727948AbgGINy1 (ORCPT ); Thu, 9 Jul 2020 09:54:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727831AbgGINy0 (ORCPT ); Thu, 9 Jul 2020 09:54:26 -0400 Received: from mail-qt1-x841.google.com (mail-qt1-x841.google.com [IPv6:2607:f8b0:4864:20::841]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54BF8C08C5DD for ; Thu, 9 Jul 2020 06:54:26 -0700 (PDT) Received: by mail-qt1-x841.google.com with SMTP id w27so1672255qtb.7 for ; Thu, 09 Jul 2020 06:54:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marek-ca.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FoYroevO5aBBa1iVjvsDAiRUR6Hq4gmMuR8nLzos3mw=; b=Z6NRe/KH8bncXG4w++4ecKr3wqovwnlWL54aD5Nzi9+BB7vjICb9LcPIGeiPYFNJVo Y/AQ6/wFhrzsBGDSIqFehClvUY0W6XyunhSG+cdNJhm6FQ6Q0D1+GGGDV5SAGpGvs35X zAq7AyAI7DqKTEHXRzXPVTE56RnZj59V6uUK5lOM+IGn5tAhi9U6Cfyk5g2zpt3KZzaP gq+urnDQkd/kAar89rPeSp5ndT15f7TJwZSdPRcp74qc7i+aIjJ4YF9EFC+us5EiP/NV VX8vfcNp6enxaHd4lSfsIM+qpUnUMnXtYmEoWWC0nTXNwCHAjoB1sA5zEKiLDy2THgFB YG8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FoYroevO5aBBa1iVjvsDAiRUR6Hq4gmMuR8nLzos3mw=; b=a/wGLepbzTfSdKWyzWqzzNSYSdvJLJMksKviHsyGGFx4037FzDAqRp2tN8SjDTEiKf T5qe2F1BfSYoXUAkIUpTGvJe5deKF2dkFqtOkxmmsqOeFwXhrdpzO0iNBkNrOPwJtPYG S1HHGzUYWqdl6MY7Hb6g9YVTAGbL6ZkF26cM6vcrJSKdJnzGmgyzAxwNpTCQW5q7/ixH v4HN3ERf2qIXWD/u2iGZEXZfwCyRuai48iMxifHj7/nBIjYZRHcgpLmtH9AD6YWZPAJ8 mqotivRWtuQ+SPZmLXqmoMCBNkWTaQoNVDX/8rTSZxXb0kfoTC9QcLlBXETbnVZ8hRFl 2khw== X-Gm-Message-State: AOAM531nRLRNuh4Ytu4hRn7cvI7MjeUuwjGynf9svznWcdpgEly7maB/ KE1nRMc6JRfV973Fkpky0SsRrg== X-Google-Smtp-Source: ABdhPJxhiX3tijNbdyq0oIUQJC6u0JCpsZSHVAijeTfA7RTEUJdj+vBHVcFpY3YlG+naGt9YwyptvA== X-Received: by 2002:ac8:7208:: with SMTP id a8mr68813599qtp.355.1594302865515; Thu, 09 Jul 2020 06:54:25 -0700 (PDT) Received: from localhost.localdomain ([147.253.86.153]) by smtp.gmail.com with ESMTPSA id 130sm3632735qkn.82.2020.07.09.06.54.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 06:54:25 -0700 (PDT) From: Jonathan Marek To: linux-arm-msm@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Deepak Katragadda , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), linux-kernel@vger.kernel.org (open list), Michael Turquette , Rob Herring , Stephen Boyd , Taniya Das , Vinod Koul Subject: [PATCH v3 00/14] Enable GPU for SM8150 and SM8250 Date: Thu, 9 Jul 2020 09:52:31 -0400 Message-Id: <20200709135251.643-1-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series adds the missing clock drivers and dts nodes to enable the GPU on both SM8150 and SM8250. Note an extra drm/msm patch [1] is required for SM8250. As noted by Dmitry, GMU init fails with newer firmware, needs this patch [2]. [1] https://patchwork.freedesktop.org/series/78968/ [2] https://git.linaro.org/landing-teams/working/qualcomm/kernel.git/commit/?h=tracking-qcomlt-sm8250&id=01331f2ccbe7e6c4719dbe038a5fb496db32646d Changes in V2: * Added "clk: qcom: gcc: fix sm8150 GPU and NPU clocks" to fix the newly added SM8150 GPU gcc clocks * Added "Fixes:" tag to "clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VAL" * Added yaml schemas to gpucc dt-bindings patches * Added "clk: qcom: add common gdsc_gx_do_nothing_enable for gpucc drivers" and changed gpucc patches to use it. * Removed CLK_IS_CRITICAL from gpu_cc_ahb_clk * Added missing rpmh regulator level for sm8250 GPU clock levels * Use sm8150/sm8250 iommu compatibles in dts * Add gcc_gpu_gpll0_clk_src/gcc_gpu_gpll0_div_clk_src to gpucc clocks in dts Changes in V3: * Combined gpucc yaml bindings into one * Removed some unused clocks from gpucc drivers to move closely match other gpucc * Use parent_data instead of parent_names Jonathan Marek (14): clk: qcom: gcc: fix sm8150 GPU and NPU clocks clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VAL clk: qcom: clk-alpha-pll: same regs and ops for trion and lucid clk: qcom: clk-alpha-pll: use the right PCAL_DONE value for lucid pll clk: qcom: gcc: remove unnecessary vco_table from SM8150 dt-bindings: clock: combine qcom,sdm845-gpucc and qcom,sc7180-gpucc dt-bindings: clock: add SM8150 QCOM Graphics clock bindings dt-bindings: clock: add SM8250 QCOM Graphics clock bindings clk: qcom: add common gdsc_gx_do_nothing_enable for gpucc drivers clk: qcom: Add graphics clock controller driver for SM8150 clk: qcom: Add graphics clock controller driver for SM8250 dt-bindings: power: Add missing rpmpd rpmh regulator level arm64: dts: qcom: add sm8150 GPU nodes arm64: dts: qcom: add sm8250 GPU nodes ...qcom,sdm845-gpucc.yaml => qcom,gpucc.yaml} | 18 +- .../bindings/clock/qcom,sc7180-gpucc.yaml | 74 ---- arch/arm64/boot/dts/qcom/sm8150.dtsi | 136 +++++++ arch/arm64/boot/dts/qcom/sm8250.dtsi | 143 +++++++ drivers/clk/qcom/Kconfig | 16 + drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clk-alpha-pll.c | 70 ++-- drivers/clk/qcom/clk-alpha-pll.h | 15 +- drivers/clk/qcom/gcc-sm8150.c | 26 +- drivers/clk/qcom/gdsc.c | 25 ++ drivers/clk/qcom/gdsc.h | 1 + drivers/clk/qcom/gpucc-sc7180.c | 27 +- drivers/clk/qcom/gpucc-sdm845.c | 27 +- drivers/clk/qcom/gpucc-sm8150.c | 320 ++++++++++++++++ drivers/clk/qcom/gpucc-sm8250.c | 348 ++++++++++++++++++ include/dt-bindings/clock/qcom,gpucc-sm8150.h | 33 ++ include/dt-bindings/clock/qcom,gpucc-sm8250.h | 34 ++ include/dt-bindings/power/qcom-rpmpd.h | 1 + 18 files changed, 1128 insertions(+), 188 deletions(-) rename Documentation/devicetree/bindings/clock/{qcom,sdm845-gpucc.yaml => qcom,gpucc.yaml} (75%) delete mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-gpucc.yaml create mode 100644 drivers/clk/qcom/gpucc-sm8150.c create mode 100644 drivers/clk/qcom/gpucc-sm8250.c create mode 100644 include/dt-bindings/clock/qcom,gpucc-sm8150.h create mode 100644 include/dt-bindings/clock/qcom,gpucc-sm8250.h -- 2.26.1